Aiwa CA-V100, Service Manual

Page: 21 / 62

21
CA-V100
52 LA17 O Address bus for EPROM
53 LA18 O Address bus for EPROM
54 LA19 — Not used
55 TDMFS I Frame signal from CD DSP
56 TDMDR I Serial data from CD DSP
57 TDMCLK I Serial clock from CD DSP
58 TBCK O Bit clock for audio DAC
59 SEL_PLL1/TWS O Audio strobe for audio DAC (TWS)
60 SEL_PLL0/TSD O Serial data for audio DAC (TSD)
61 MCLK O Serial clock for audio DAC
62 CAS# O Column address strobe for DRAM
63 DRAS1# — Not used
64 VPP — Power supply (3.3V)
65 VSS — Ground
66 VCC — Power supply (2.6V)
67 DRAS0# O Row address strobe for DRAM
68 DWE# O Write enable for DRAM
69 DOE#/MA9 O Address bus for DRAM (MA9)
70 MA0 O Address bus for DRAM
71 MA1 O Address bus for DRAM
72 MA2 O Address bus for DRAM
73 MA3 O Address bus for DRAM
74 MA4 O Address bus for DRAM
75 MA5 O Address bus for DRAM
76 MA6 O Address bus for DRAM
77 MA7 O Address bus for DRAM
78 MA8 O Address bus for DRAM
79 DBUS0 I/O Data bus for DRAM
80 DBUS1 I/O Data bus for DRAM
81 DBUS2 I/O Data bus for DRAM
82 DBUS3 I/O Data bus for DRAM
83 DBUS4 I/O Data bus for DRAM
84 DBUS5 I/O Data bus for DRAM
85 DBUS6 I/O Data bus for DRAM
86 DBUS7 I/O Data bus for DRAM
87 DBUS8 I/O Data bus for DRAM
88 DBUS9 I/O Data bus for DRAM
89 DBUS10 I/O Data bus for DRAM
90 DBUS11 I/O Data bus for DRAM
91 DBUS12 I/O Data bus for DRAM
92 DBUS13 I/O Data bus for DRAM
93 DBUS14 I/O Data bus for DRAM
94 DBUS15 I/O Data bus for DRAM
95 VCC — Power supply (2.6V)
96 RESET# I System reset
97 VSS — Ground
98 VSS_P — Ground
99 VCC_P — Power supply (2.6V)
100 AUX20 O Clock for SBSO
101 AUX21 I SQSO data from CD DSP
102 AUX22 O SQCK clock for CD DSP
103 AUX23 — Pulled down to ground
104 AUX24 I C2PO from CD DSP
Pin No. Pin Name I/O Pin Description
www. xiaoyu163. com
QQ 376315150
9 9
2
8 9
4 2
9 8
TEL 13942296513 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com