Aiwa AV-D67, Service Manual, Page: 30 / 35

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60 VSS -
Ground.
61 RAMA4 O External SRAM Interface address 4. (Not used)
62 /IC I Initial clear.
63 TEST - Test terminal (Not used).
64 RAMA3 O External SRAM Interface address 3. (Not used)
65 /CSB I Sub DSP Chip select.
66 /CS I Microprocessor interface Chip select.
67 SO O Microprocessor interface Serial data output.
68 SI I Microprocessor interface / Sub DSP Serial data input.
69 SCK I Microprocessor interface / Sub DSP clock input.
70 RAMA2 O External SRAM Interface address 2. (Not used)
71 VDD1 - +5V power supply (for I/Os).
72~79 RAMD0~7 I/O
External SRAM Interface data (STREAM0~7 output when External SRAM is not in use).
(Not used)
80 VSS -
Ground.
81 VDD2 - +3.3V power supply (for core logic).
82 SDWCK0 I Word clock input for SDIA, SDOA, SDIB, SDOB.
83 SDBCK0 I Bit clock input for SDIA, SDOA, SDIB, SDOB.
84 SDIA0 I AC-3 bitstream (or PCM ) data input for Main DSP.
85 SDIA1 I AC-3 bitstream (or PCM ) data input for Main DSP.
86,87 RAMA1,0 O External SRAM Interface address 1, 0. (Not used)
88 RAMWEN O External SRAM Interface / WE. (Not used)
89 RAMOEN O External SRAM Interface / OE. (Not used)
90 VSS - Ground.
91 VDD2 - +3.3V power supply (for core logic).
92~99 IPORT7~0 I Input port for general purpose.
100 VSS - Ground.
Pin No. Pin Name I/O Description