Agilent Technologies N4962A, User Manual

Page: 53 / 88

Operation
Serial BERT 12.5 Gb/s User Guide 53
4.4 Power-On State
The power-on state of the N4962A is set after turning the rear Power switch
on. The internal clock is active and generates a 10.0 GHz clock. The PRBS
generator is off. The error detector is off, in training mode, and will not
accumulate errors. The error detector light may indicate errors if the default
sampling position is incompatible with the cable length, or if the OUT/OUT ¯¯¯
port(s) are not connected to the IN/IN ¯¯port(s).
Table 16. N4962A power-on state
Setting Display Description Value
Local Light Local push-button (vs GPIB) control On
Receiver On Light Error detector Off
PRBS ¯¯¯¯ Light PRBS output inverted Off
Data Path 3 lights Data path Disabled
Error ε Light Bit error detected Undetermined
Freq Display Internal clock speed 10.0 GHz
Ampl Not shown PRBS output amplitude 0.500 V
Ø Not shown Error detector clock phase adjustment 0 (degrees)
PAT 2E31 Not shown PRBS pattern length 2
31
-1
MS 0.500 Not shown PRBS mark space density 0.500
Jitter 0 Not shown Jitter-injection mode Off (0)
Synth 1 Not shown Internal clock On (1)
Err00000 Not shown Measured BER errors 0
ErAd OFF Not shown PRBS errors added per second Off (none)
NoData Not shown Error detector data sense 0 (off)