Agilent Technologies E2259A, User'S Manual And Programming Manual, Page: 23 / 52

20 Using the Breadboard
Writing Data to Output Registers
To output data over the data bus lines (BC0 - BC15), write the data to the
I/O register at 14
h
in A24 Memory. Figure 2-1 shows the timing of writing
data to the I/O register. You only have access to the DBEN*, LAT*, W14*,
and BUSY* control lines; the other control line waveforms (SYSCLK,
DS0*, DS1*, CS*, DTACK*, and MA0-MA7) are provided for reference
information only. Note:
•
W14* has the same timing as LAT* when writing to 14H in A24
memory space.
•
IRQ* is asserted at the end of the BUSY cycle (see "Using the
Interrupt" on page 24). The BUSY* line pulse lasts 13mS if the
module default is used. You can change the BUSY time by writing a
value to the Delay Timer Register at address 12
h
. Refer to Chapter 3
for details.
•
MD15-MD0 are latched to BC15-BC0 at the rising edge of W14*.
Figure 2-1. Timing of Writing to I/O Register
MSYSCLK
DS0*
DS1*
CS*
DTACK*
MA(7:0)
MD(15:0)
W14*
(16MHz)
62.5 ns 62.5 ns 62.5 ns 190 ns
< 40 ns
62.5 ns 62.5 ns
BUSY*
DBEN*
LAT*
WPn