Aegis ATC-HZ5510C-LCN, Manual

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LVDS Single Output receiver circuit example / Receiver IC Pin Assign : THC63LVD104C
Pin No. Description Signal Pin No. Description Signal
1 GND0 33 RB5
2 TEST 34 RB4
3 PD 35 RB3 FLD
4 OE 36 RB2 VSYNC
5 R/F 37 VCC2
6 RE6 38 RB1 HSYNC
7 RE5 39 RB0 Y7
8 RE4 40 RA6 Y6
9 VCC0 41 RA5 Y5
10 RE3 42 RA4 Y4
11 RE2 43 RA3 Y3
12 RE1 44 GND3
13 RE0 45 RA2 Y2
14 RD6 46 RA1 Y1
15 RD5 47 RA0 Y0
16 GND1 48 VCC3
17 RD4 49 RA- TXOUT0-
18 RD3 50 RA+
19 RD2 51 RB- TXOUT1-
20 RD1 52 RB+
21 RD0 C7 53 LVCC
22 RC6 C6 54 RC- TXOUT2-
23 VCC1 55 RC+
24 RC5 C5 56 RCLK- TXCLKOUT-
25 RC4 C4 57 RCLK+ T
26 RC3 C3 58 LGND
27 RC2 C2 59 RD- TXOUT3-
28 RC1 C1 60 RD+
29 RC0 C0 61 RE-
30 GND2 62 RE+
31 CLK_OUT PCLK 63 PGND
32 RB6 64 PVCC