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2.16.6 SDIO Signals Trace Length Guidelines
Figure 35
: Topology for SDIO
Table 48
: SDIO Trace Length Guidelines
Parameter
Main Route Guidelines
Notes
Signal Group
SDIO
1
Single End
50Ω ±10%
1
DATA to CLK Maximum Pin to Pin
Length Mismatch
500 mils
1
Main Route segment for
CMD/Data/CD#
Minimum Trace Spacing Between Other SD Card and
Interface Signals
5 mils
1
Main Route segment for CLK)
Minimum Trace Spacing Between Other SD Card and
Interface Signals
15mils
1
Spacing to Other Signal Group
Min. 15mils
1
LA
SOM-5992 doesn’t support SDIO.
1
LB
Carrier Board Length
1
Max length of LA+LB
”
1
Length matching
Data/CMD to Clock must be matched within
200mils
1
Reference Plane
Continuous ground only
1
Via Usage
Max 2 vias
1
Notes:
1. SOM-5992 don’t support SDIO.
