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SOM-5883 User Manual

PCI Express Root Port 0

Figure 3.40 PCI Express Root Port 0



PCI Express Root Port 0

Control the PCI Express Root Port.



Connection Type

Built-In: a built-in device is connected to this root port. Slot Implemented bit will

be clear. Slot: this root port connects to user-accessible slot. Slot Implemented

bit will be set.



ASPM

PCI Express Active State Power Management settings.



Hot plug

PCI Express hot plug enable/disable.



PCIe Speed

Configure PCIe Speed.

Summary of Contents for SOM-5883

Page 1: ...User Manual SOM 5883 CPU Computer on Module ...

Page 2: ...liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most customers never need to use our repair service If an Advantech product is defective it will be repaired or replaced free of charge during the warranty period For out of warranty repairs customers will be billed according to the cost of replaceme...

Page 3: ...ause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which t...

Page 4: ...t if not observed can cause personal injury Caution Cautions are included to help prevent hardware damage and data losses For example Batteries are at risk of exploding if incorrectly installed Do not attempt to recharge force open or heat the battery Replace the battery only with the same or equivalent type as recommended by the manufacturer Discard used batteries according to the manufacturer s ...

Page 5: ...2 6GHz N A 35W 8MB QM580E non ECC N A N A Active 0 60 C 32 140 F SOM 5883D8R U6A1 Xeon W 11865MR E 8C 8 2 6GHz 4 7GHz 45W 35W 24MB RM590E ECC N A N A Active 0 60 C 32 140 F SOM 5883D6R U6A1 Xeon W 11555MR E 6C 6 2 6GHz 4 5GHz 45W 35W 12MB RM590E ECC N A N A Active 0 60 C 32 140 F SOM 5883D4R U4A1 Xeon W 11155MR E 4C 4 2 4GHz 4 4GHz 45W 35W 8MB RM590E ECC N A N A Active 0 60 C 32 140 F SOM 5883D8R ...

Page 6: ...omponents on the CPU card or other cards while the PC is powered on Disconnect the power before making any configuration changes A sudden rush of power after connecting a jumper or installing a card may damage sensitive electronic components Part No Description Quantity SOM 5883 COM module 1 1970005238T000 Heatspreader of SOM 5883 1 Part No Description SOM DB5830 00A2 COMe Devel Board COMe R3 0 Ty...

Page 7: ...ur liquid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If any of the following occurs have the equipment checked by service person nel The power cord or plug is damaged Liquid has penetrated the equipment The equipment has been exposed to moisture The equipment is malfunc...

Page 8: ...SOM 5883 User Manual viii ...

Page 9: ...e 2 2 Board Chips Rear 14 2 2 Mechanical Diagram 15 Figure 2 3 Board Mechanical Diagram Front 15 Figure 2 4 Board Mechanical Diagram Rear 15 Figure 2 5 Board Mechanical Diagram Side 1 15 Figure 2 6 Board Mechanical Diagram Side 2 16 2 3 Assembly Diagram 17 Figure 2 7 Assembly Diagram 17 2 4 Assembly Diagram 18 Figure 2 8 CPU Height and Tolerance 18 Figure 2 9 PCH Height and Tolerance 18 Chapter 3 ...

Page 10: ...TXT Information 45 Figure 3 25Intel TXT Information 45 3 4 11 USB Configuration 46 Figure 3 26USB Configuration 46 3 4 12 Network Stack Configuration 47 Figure 3 27Network Stack Configuration 47 3 4 13 NVME Configuration 48 Figure 3 28NVME Configuration 48 Figure 3 29SM681GEC AES 49 3 5 Chipset Setup 50 Figure 3 30Chipset Setup 50 3 5 1 System Agent SA Configuration 51 Figure 3 31System Agent SA C...

Page 11: ... 73 Appendix A Pin Assignment 75 A 1 SOM 5883 Pin Assignment 76 Appendix B Watchdog Timer 83 B 1 Programming the Watchdog Timer 84 Appendix C Programming GPIO 85 C 1 GPIO Register 86 Appendix D System Assignments 87 D 1 System I O Ports 88 Table D 1 System I O Ports 88 D 2 Interrupt Assignments 89 Table D 2 Interrupt Assignments 89 D 3 1st MB Memory Map 90 Table D 3 1st MB Memory Map 90 ...

Page 12: ...SOM 5883 User Manual xii ...

Page 13: ...Chapter 1 1 General Information This chapter details background information on the SOM 5883 CPU Computer on Module Sections include Introduction Functional Block Diagram Product Specifications ...

Page 14: ... 4 HDMI 2 1 1 x optional eDP or LVDS and 1 x VGA interface SOM 5883 can be configured with up to 2 x 8K HDR outputs It also supports optional NVMe SSD TPM 2 0 on board design 8 5 20V power input and wide operating temperatures 40 85 C 40 185 F It includes a heat spreader QFCS solution Advantech iManager SUSI 4 satisfies diverse embedded application requirements by providing a multi level watchdog ...

Page 15: ...er storage area GPIO GbE Gigabit Ethernet GPIO General purpose input output HDA Intel High Definition Audio HD Audio refers to the specification released by Intel in 2004 for delivering high definition audio that is capable of playing back more channels at higher quality than AC 97 I2 C Inter Integrated Circuit 2 wire clock and data signaling scheme allowing communication between integrated circui...

Page 16: ...SOM 5883 User Manual 4 1 2 Functional Block Diagram ...

Page 17: ...BUS muxed on SER1 1 0 1 I O A B LAN Port 0 Gigabit Ethernet 1 1 1 A B SATA 4 1 4 A B USB 2 0 8 4 8 A B USB Client 1 0 0 A B HD Audio 1 0 1 A B SPI Bus 2 1 1 A B General Purpose I O GPIO 8 8 8 A B SDIO muxed on GPIO 1 0 0 A B Watchdog Timer Output 1 0 1 A B Speaker Out 1 1 1 A B External BIOS ROM Support 2 0 1 A B Power Button Support 1 1 1 A B Power Good 1 1 1 A B VCC_5V_SBY Contacts 4 4 4 A B Sle...

Page 18: ...I2 DDI3 1 3 6 Expansion Interfaces PCIe x1 CPU Std Freq Max Turbo Freq Core Cache MB TDP W i7 11850HE 2 6 GHz 4 7 GHz 8 24 45W 35W i5 11500HE 2 6 GHz 4 5 GHz 6 12 45W 35W i3 11100HE 2 4 GHz 4 4 GHz 4 8 45W 35W 6600HE 2 6 GHz 2 8 35W W 11865MRE 2 6 GHz 4 7 GHz 8 24 45W 35W W 11555MRE 2 6 GHz 4 5 GHz 6 12 45W 35W W 11155MRE 2 4 GHz 4 4 GHz 4 8 45W 35W W 11865MLE 1 5 GHz 4 5 GHz 8 24 25W CPU Graphic ...

Page 19: ... 9 I O 1 3 9 1 Gigabit Ethernet Ethernet Intel I225 Gigabit LAN supports 10 100 1000 Mbps 2 5 Gbps Speed 1 3 9 2 SATA Supports 4 x ports SATA Gen3 6 0 Gb s backward compliant to SATA Gen2 3 0 Gb s and Gen1 1 5 Gb s The maximum data rate is 600 MB s Supports AHCI 1 3 1 mode does not support IDE mode 1 3 9 3 USB 3 2 USB 2 0 COM Express supports USB 3 0 but SOM 5883 supports 4 x USB 3 2 Gen2 10 Gbps ...

Page 20: ...le FIFO or character mode 16 byte FIFO buffer on transmitter and receiver in FIFO mode Programmable serial interface characteristics 5 6 7 or 8 bit character Even odd or no parity bit selectable 1 1 5 or 2 stop bit selectable Baud rate up to 115 2K 1 3 9 10 TPM Supports TPM 2 0 module by default 1 3 9 11 Smart Fan Supports 2 x Fan PWM control signals and 2 x tachometer input for fan speed detec ti...

Page 21: ...the first boot up The standard module has no jumper at SCN6 so BIOS settings are kept without a RTC coin battery If you need to restore the BIOS to default settings follow the steps below 1 Remove the coin battery 2 Put jumper on SCN6 pin1 2 3 Turn on power supply 4 The system will boot up a few times 5 The BIOS will load default settings successfully BIOS_DIS 0 BIOS_DIS 1 Boot up destination func...

Page 22: ...OS LPC Wake depends on user inquiry and may need customized BIOS 1 3 10 5 Advantech S5 ECO Mode Deep Sleep Mode Advantech iManager provides additional features allowing the system to enter a very low suspended power mode S5 ECO mode In this mode the module will cut all power including suspended and active power to the chipset and keep an on module controller active Only power under 50MW will be co...

Page 23: ...up file 1 3 14 Advantech iManager Supports APIs for GPIO smart fan control multi stage watchdog timer temperature sensor and hardware monitoring Follows PICMG EAPI 1 0 specifications with back ward compatibility 1 3 15 Power Consumption Hardware Configurations 1 MB SOM 5883C7Q U6A1 2 DRAM 32GB DDR4 3200MHz x 4pcs 2pcs top side by default 2pcs bottom side by option 3 Carrier board SOM DB5830 00A2 S...

Page 24: ... for schematic design and layout routing The schematic checklist will specify details about each pin s electrical properties and how to connect it in different scenarios The layout checklist will specify the layout con straints and recommendations for trace length impedance and other necessary information during design Please contact your regional Advantech branch office to acquire design document...

Page 25: ...Chapter 2 2 Mechanical Information This chapter details mechanical information for the SOM 5883 CPU Computer on Module Sections include Board Information Mechanical Drawings Assembly Drawings ...

Page 26: ... avoid mechanical damage and to improve thermal dissipation performance Figure 2 1 Board Chips Front Figure 2 2 Board Chips Rear DDR4 SO DIMM by default Channel B DDR4 SO DIMM by default Channel A 11th GeneraƟon Intel Core Processor Smart FAN controller NVME Intel 500 Series Chipset Com Express connector A B Com Express connector C D DDR4 SO DIMM ďǇ ŽƉƟŽŶ Channel A DDR4 SO DIMM ďǇ ŽƉƟŽŶ Channel B ...

Page 27: ...Mechanical Diagram For more details regarding 2D 3D models please visit the Advantech COM support service website http com advantech com Figure 2 3 Board Mechanical Diagram Front Figure 2 4 Board Mechanical Diagram Rear Figure 2 5 Board Mechanical Diagram Side 1 ...

Page 28: ...SOM 5883 User Manual 16 Figure 2 6 Board Mechanical Diagram Side 2 ...

Page 29: ... 2 3 Assembly Diagram These figures demonstrate the order of assembly needed when attaching the thermal module and COM module to the carrier board Figure 2 7 Assembly Diagram There are 5 x reserved screw holes for SOM 5883 used to assemble the heat spreader ...

Page 30: ...SOM 5883 User Manual 18 2 4 Assembly Diagram Consider the CPU and chip height tolerance when designing your thermal solution Figure 2 8 CPU Height and Tolerance Figure 2 9 PCH Height and Tolerance ...

Page 31: ...Chapter 3 3 AMI BIOS This chapter details BIOS setup information for the SOM 5883 CPU computer on module Sections include Introduction Entering Setup Hot Operation Key Exit BIOS Setup Utility ...

Page 32: ...tures This chapter describes the basic navigation of the BIOS Setup Utility Figure 3 1 Setup Program Initial Screen AMI s BIOS ROM has a built in setup program that allows users to modify the basic system configuration This information is stored in flash ROM so it retains the Setup information when the power is turned off 3 2 Entering Setup Turn on the computer and then press DEL or ESC to enter t...

Page 33: ...all the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text message When an option is selected in the left frame it is highlighted in white Often a text message will accom pany it System time System date Use this option to change the system time and date Highlight Syst...

Page 34: ...wn below The sub menus are described on the following pages Figure 3 3 Advanced BIOS Features Setup Screen RC ACPI Settings System ACPI Parameters CPU Configuration CPU Configuration Parameters Power Performance Power Performance Options PCH FW Configuration Configure Management Engine Technology Parameters AMT Configuration Configure Intel R Active Management Technology Parameters Intel R Time Co...

Page 35: ...k Configuration Network Stack Settings NVMe Configuration NVMe controller and Drive information 3 4 1 RC ACPI Settings Figure 3 4 RC ACPI Settings Low Power S0 Idle Capability This variable determines if we enable ACPI Lower Power S0 Idle Capability Mutually exclusive with Smart connect While this is enabled it also disable 8254 timer for SLP_S0 support ...

Page 36: ...y Vanderpool Technology Active Processor Cores Number of cores to enable in each processor package Hyper Threading Enable or Disable Hyper Threading Technology AES Enable Disable AES Advanced Encryption Standard MonitorMwait Enable Disable Monitor Mwait Intel Trusted Execution Technology Enables utilization of additional hardware capabilities provided by Intel R Trusted Execution Technology ...

Page 37: ...User Manual Chapter 3 AMI BIOS 3 4 3 Power Performance Figure 3 6 Power Performance CPU Power Management Control CPU Power Management Control Options GT Power Management Control GT Power Management Control Options ...

Page 38: ...will set starting from reset vector Intel R SpeedStep tm Allows more than two frequency ranges to be supported Turbo Mode Enable Disable processor Turbo Mode requires EMTTM enabled too AUTO means enabled Config TDP Configurations Config TDP Configurations C states Enable Disable CPU Power Management Allows CPU to go to C states when it s not 100 utilized ...

Page 39: ...ter 3 AMI BIOS Config TDP Configurations Figure 3 8 Config TDP Configurations Configurable TDP Boot Mode Configurable TDP Mode as Nominal Up Down Deactivate TDP selection Deac tivate option will set MSR to Nominal and MMIO to Zero ...

Page 40: ...SOM 5883 User Manual 28 3 4 3 2 GT Power Management Control Figure 3 9 GT Power Management Control RC6 Render Standby Check to enable render standby support ...

Page 41: ...on Figure 3 10 PCH FW Configuration AMT Configuration Configure Intel R Active Management Technology Parameters ME Unconfig on RTC Clear When Disabled ME will nor unconfigured on RTC clear Firmware Update Configuration Configure Management Engine Technology Parameters ...

Page 42: ...SOM 5883 User Manual 30 3 4 4 1 AMT Configuration Figure 3 11 AMT Configuration OEM Flags Settings Configure OEM Flags ...

Page 43: ... 1 to enter ME Configuration Screens Press 2 to initiate a remote connection Note Network Access must be activated from MEBx Setup for this screen to be displayed Hide Unconfigure ME Confirmation Prompt OEMFlag Bit 6 Hide Unconfigure ME confirmation prompt when attempting ME unconfiguration MEBx OEM Debug Menu Enable OEMFlag Bit 14 Enable OEM debug menu in MEBx Unconfigure ME OEMFlag Bit 15 Unconf...

Page 44: ...SOM 5883 User Manual 32 3 4 4 2 Firmware Update Configuration Figure 3 13 Firmware Update Configuration Me FW Image Re Flash Enable Disable Me FW Image Re Flash function ...

Page 45: ...bled this will modify system settings to improve real time performance The full list of settings and their cur rent state are displayed below when Intel R TCC mode is enabled IO Fabric Low Latency Enable or Disable IO Fabric Low Latency This will turn off some power manage ment in the PCH IO fabrics This option provides the most aggressive IO Fabric performance setting S3 state is NOT supported OP...

Page 46: ...em agent geyserville Can disable fix to a specific point or enable fre quency switching Page Close Idle Timeout Page close idle timeout control Power Down Mode CKE Power Down Mode Control RC6 Render standby Check to enable render standby support DMI Link ASPM Control The control of Active State Power Management of the DMI Link PCI Express Clock Gating PCI Express Clock Gating Enable Disable for ea...

Page 47: ... Endorsement Hierarchy Enable or Disable Endorsement Hierarchy Physical Presence Spec Version Select to Tell O S to support PPI Spec Version 1 2 or 1 3 Note some HCK tests might not support 1 3 Device Select TPM 1 2 will restrict support to TPM 1 2 devices TPM 2 0 will restrict support to TPM 2 0 devices Auto will support both with the default set to TPM 2 0 devices if not found TPM 1 2 devices wi...

Page 48: ...s BIOS ACPI Auto Configuration Enable Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed S3 Video Repost Enable or Disable S3 Video Repost ...

Page 49: ... Switch Backlight Enable Polarity for Native or Invert Backlight Mode Selection Switch Backlight Control to PWM or DC mode Brightness PWM Polarity Backlight Control Brightness PWM Polarity for Native or Invert Power Saving Mode Select Power Saving Mode Serial Port 1 Configuration Set Parameters of Serial Port 1 COMA Serial Port 2 Configuration Set Parameters of Serial Port 2 COMB Hardware Monitor ...

Page 50: ...SOM 5883 User Manual 38 I2C0 Control Enable Disable I2C0 controller on RDC IS200 SMBus0 Control Enable Disable SMBus0 controller on RDC IS200 3 4 8 1 Hardware Monitor Figure 3 18 Hardware Monitor ...

Page 51: ...ser Manual Chapter 3 AMI BIOS 3 4 8 2 Serial Port 1 Configuration Figure 3 19 Serial Port 1 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal settings for Super IO Device ...

Page 52: ...elect the ACPI reporting method for EC I2C Bus PNP0C02 Reported as reserved motherboard resource Otherwise Reported vendor _HID Driver installation is necessary ACPI Report Method for SMBus Select the ACPI reporting method for EC SMBus PNP0C02 Reported as reserved motherboard resource Otherwise Reported vendor _HID Driver installation is necessary ACPI Report Method for GPIO Select the ACPI report...

Page 53: ...s COM2 Console Redirection Console Redirection Enable or Disable Console Redirection Settings The settings specify how the host computer and the remote computer which the user is using will exchange data Both computers should have the same or compatible settings Legacy Console Redirection Legacy Console Redirection Settings Console Redirection EMS Console Redirection Enable or Disable Console Redi...

Page 54: ...s is even Odd parity bit is 0 if num of 1 s in the data bits is odd Mark parity bit is always 1 Space Parity bit is always 0 Mark and Space Parity do not allow for error detection They can be used as an additional data bit Stop Bits Stop bits indicate the end of a serial data packet A start bit indicates the begin ning The standard setting is 1 stop bit Communication with slow devices may require ...

Page 55: ...tings Figure 3 23 Legacy Console Redirection Settings Redirection COM Port Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages Resolution On Legacy OS the Number of Rows and Columns supported redirection Redirect After POST When Bootloader is selected then Legacy Console Redirection is disabled before booting to legacy OS When Always Enable is selected then Legacy Conso...

Page 56: ...t data loss from buffer overflow When sending data if the receiving buffers are full a stop signal can be sent to stop the data flow Once the buffers are empty a start signal can be sent to re start the flow Hard ware flow control uses two wires to send start stop signals Data Bits EMS Parity A parity bit can be sent with the data bits to detect some transmission errors Even parity bit is 0 if the...

Page 57: ...45 SOM 5883 User Manual Chapter 3 AMI BIOS 3 4 10 Intel TXT Information Figure 3 25 Intel TXT Information ...

Page 58: ...ort The XHCI owner ship change should be claimed by XHCI driver USB Mass Storage Driver Support Enable Disable USB Mass Storage Driver Support USB transfer time out The time out value for Control Bulk and Interrupt transfers Device reset time out USB mass storage device Start Unit command time out Device power up delay Maximum time the device will take before it properly reports itself to the Host...

Page 59: ... support If disabled IPv4 HTTP boot support will not be available IPv6 PXE Support Enable Disable IPv6 PXE boot support If disabled IPv6 PXE boot support will not be available IPv6 HTTP Support Enable Disable IPv6 HTTP boot support If disabled IPv6 HTTP boot support will not be available PXE boot wait time Wait time in seconds to press ESC key to abort the PXE boot Use either or numeric keys to se...

Page 60: ...SOM 5883 User Manual 48 3 4 13 NVME Configuration Figure 3 28 NVME Configuration SM681GEC AES Note This is optional component ...

Page 61: ...ion will take several minutes to complete Self Test Action Select either to test Contoller alone or Controller and NameSpace Selecting Controller and Namespace option will take lot longer to complete the test Run Device Self Test Perform device self test for the corresponding Option and Action selected by user Pressing Esc key will abort the test Result shown below is the recent result logged in t...

Page 62: ...SOM 5883 User Manual 50 3 5 Chipset Setup Figure 3 30 Chipset Setup System Agent SA Configuration System Agent Parameters PCH I0 Configuration PCH parameters ...

Page 63: ...nt SA Configuration Memory Configuration Memory Configuration Parameters Graphic Configuration VMD setup menu VMD Configuration VT d VT d capability Above 4GB MMIO BIOS assignment Enable Disable above 4GB memory mapped IO BIOS assignment This is enabled automatically when aperture size is set to 2048MB ...

Page 64: ...emory Configuration Max TOLUD Maximum value of TOLUD Dynamic assignment would adjust TOLUD automat ically based on the largest MMIO length of installed graphic controller SA GV System Agent Geyserville Can disable fix to a specific point or enable fre quency switching ...

Page 65: ...t HG for Hybrid Gfx Internal Graphics Keep IGFX enabled base on the setup options GTT Size Select the GTT size Aperture Size Select the aperture size Note Above 4GB MMIO BIOS assignment is atomi cally enabled when selecting 2048MB aperture To use this feature please dis able CSM support DVMT Pre Allocated Select DVMT5 0 pre allocated fixed Graphics Memory size is used by the inter nal graphics dev...

Page 66: ...SOM 5883 User Manual 54 LCD Control Figure 3 34 LCD Control LCD Panel Type Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item ...

Page 67: ... controller Enable Disable to VMD controller Enable VMD Global Mapping Enable Disable to VMD Global Mapping Map this Root Port under VMD RAID0 Enable Disable RAID0 feature RAID1 Enable Disable RAID1 feature Intel R Optane TM Memory Enable Disable System Acceleration with Intel R Optane TM Memory feature ...

Page 68: ...6 3 5 1 4 PCI Express Configuration Figure 3 36 PCI Express Configuration PEG PCIe Port Config Config PEG PCIe Lane 0 15 setting PCI Express Root Port 1 PCI Express Root Port 2 PCI Express Root Port 3 PCI Express Root Port 4 ...

Page 69: ...Express Root Port Connection Type Built In a built in device is connected to this root port Slot Implemented bit will be clear Slot this root port connects to user accessible slot Slot Implemented bit will be set ASPM PCI Express Active State Power Management settings Hot Plug PCI Express Hot Plug Enable Disable PCIe Speed Configure PCIe Speed ...

Page 70: ...ty Configuration settings HD Audio Configuration HD audio subsystem configuration settings SerialIo Configuration SerialIo configuration settings State After G3 Specify what state to go to when power is re applied after a power failure G3 state Pcie Ref Pll SSC Pcie Ref Pll SSC Percentatge AUTO Keep hw default no BIOS override Range is 0 0 0 5 SPD Write Disable Enable Disable setting SPD Write Dis...

Page 71: ...t3 Port2 Port1 Port0 PCH PCIe Port Config 2 Config COMe PCIe Port7 Port6 Port5 Port4 DMI Link ASPM Control The control of Active State Power Management of the DMI Link PCI Express Root Port 0 PCI Express Root Port 1 PCI Express Root Port 2 PCI Express Root Port 3 PCI Express Root Port 4 PCI Express Root Port 5 PCI Express Root Port 6 PCI Express Root Port 7 ...

Page 72: ...ot Port Connection Type Built In a built in device is connected to this root port Slot Implemented bit will be clear Slot this root port connects to user accessible slot Slot Implemented bit will be set ASPM PCI Express Active State Power Management settings Hot plug PCI Express hot plug enable disable PCIe Speed Configure PCIe Speed ...

Page 73: ...le Loop Back Software Feature Mask Configuration RST Legacy OROM RST UEFI driver will refer to the SWFM configuration to enable disable the storage features Aggressive LPM Support Enable PCH to aggressively enter link power state SATA Controller Speed Indicates the maximum speed the SATA controller can support Port 0 Enable or Disable SATA Port SATA Device Type Identify the SATA port is connected ...

Page 74: ...able Override Selectively Enable Disable the corresponding USB port from reporting a Device Connection to the controller USB SS Physical Connector 0 Enable Disable this USB Physical Connector physical port Once disabled any USB devices plug into the connector will not be detected by BIOS or OS ...

Page 75: ...ity Configuration Figure 3 43 Security Configuration RTC Memory Lock Enable will lock bytes 38h 3Fh in the lower upper 126 byte bank of RTC RAM BIOS Lock Enable Disable the PCH BIOS lock enable feature Required to be enabled to ensure SMM protection of flash ...

Page 76: ...D Audio Subsystem Configuration Settings Figure 3 44 HD Audio Subsystem Configuration Settings HD Audio Control Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally enabled ...

Page 77: ...emain and device PCI CFG Space will still be visible This is needed to allow PCI enu merator access functions above 0 in a multifunction device The following devices depend on each other I2C0 and I2C1 2 3 UART0 and UART1 SPI0 1 UART2 and I2C4 5 UART 0 00 30 00 cannot be disabled when 1 Child device is enabled like CNVi Bluetooth _SB PC00 UA00 BTH0 UART 0 00 30 00 cannot be enabled when 1 I2S Audio...

Page 78: ...SOM 5883 User Manual 66 3 6 Security Chipset Figure 3 46 Security Chipset Administrator Password Set Setup Administrator Password User Password Set User Password Secure Boot Secure Boot Configuration ...

Page 79: ...e is Active if Secure Boot is Enabled Platform Key PK is enrolled and the System is in User mode The mode change requires platform reset Secure Boot Mode Secure Boot mode options Standard or Custom In Custom mode Secure Boot Policy variables can be configured by a physi cally present user without full authentication ...

Page 80: ...t for setup activation key 65535 0xFFFF means indefinite waiting Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enables or disables Quiet Boot option Boot Option 1 Sets the system boot order Fast Boot Enable or Disable FastBoot features Most probes are skipped to reduce time cost during boot ...

Page 81: ... saving the changes Discard Changes and Reset Reset system setup without saving any changes Save Changes Save Changes done so far to any of the setup options Discard Changes 005B Discard Changes done so far to any of the setup options Restore Defaults Restore Load Default values for all the setup options Save as User Defaults Save the changes done so far as User Defaults Restore User Defaults Rest...

Page 82: ...SOM 5883 User Manual 70 ...

Page 83: ...Chapter 4 4 S W Introduction Installation S W Introduction Driver Installation Advantech iManager ...

Page 84: ...istributors for projects Our goal is to make Windows Embedded Software solu tions easily and widely available to the embedded computing community 4 2 Driver Installation The Intel Chipset Software Installation CSI utility installs the Windows INF files that explain how chipset components are configured to the operating system 4 2 1 Windows Driver Setup To install the drivers on a windows based ope...

Page 85: ...provide an advanced watchdog to handle errors just as they happen iManager also comes with a secure encrypted EEPROM for storing important security key or other customer define information All the embedded functions are configured through API and pro vide corresponding utilities to demonstrate These APIs comply with PICMG EAPI Embedded Application Programmable Interface specification and unify in ...

Page 86: ...SOM 5883 User Manual 74 ...

Page 87: ...Appendix A A Pin Assignment This appendix gives you the infor mation about the hardware pin assignment of the SOM 5883 CPU System on Module Sections include SOM 5883 Type 6 Pin Assign ment ...

Page 88: ..._MDI1 B9 N A A10 GBE0_MDI1 B10 LPC_CLK A11 GND FIXED B11 GND FIXED A12 GBE0_MDI0 B12 PWRBTN A13 GBE0_MDI0 B13 SMB_CK A14 N A B14 SMB_DAT A15 SUS_S3 B15 SMB_ALERT A16 SATA0_TX B16 SATA1_TX A17 SATA0_TX B17 SATA1_TX A18 SUS_S4 B18 SUS_STAT A19 SATA0_RX B19 SATA1_RX A20 SATA0_RX B20 SATA1_RX A21 GND FIXED B21 GND FIXED A22 SATA2_TX B22 SATA3_TX A23 SATA2_TX B23 SATA3_TX A24 SUS_S5 B24 PWR_OK A25 SATA...

Page 89: ...CIE_TX2 B61 PCIE_RX2 A62 PCIE_TX2 B62 PCIE_RX2 A63 GPI1 B63 GPO3 A64 PCIE_TX1 B64 PCIE_RX1 A65 PCIE_TX1 B65 PCIE_RX1 A66 GND B66 WAKE0 A67 GPI2 B67 WAKE1 A68 PCIE_TX0 B68 PCIE_RX0 A69 PCIE_TX0 B69 PCIE_RX0 A70 GND FIXED B70 GND FIXED A71 LVDS_A0 B71 LVDS_B0 A72 LVDS_A0 B72 LVDS_B0 A73 LVDS_A1 B73 LVDS_B1 A74 LVDS_A1 B74 LVDS_B1 A75 LVDS_A2 B75 LVDS_B2 A76 LVDS_A2 B76 LVDS_B2 A77 LVDS_VDD_EN B77 LV...

Page 90: ...12V B105 VCC_12V A106 VCC_12V B106 VCC_12V A107 VCC_12V B107 VCC_12V A108 VCC_12V B108 VCC_12V A109 VCC_12V B109 VCC_12V A110 GND FIXED B110 GND FIXED SOM 5883 Row C D C1 GND FIXED D1 GND FIXED C2 GND D2 GND C3 USB_SSRX0 D3 USB_SSTX0 C4 USB_SSRX0 D4 USB_SSTX0 C5 GND D5 GND C6 USB_SSRX1 D6 USB_SSTX1 C7 USB_SSRX1 D7 USB_SSTX1 C8 GND D8 GND C9 USB_SSRX2 D9 USB_SSTX2 C10 USB_SSRX2 D10 USB_SSTX2 C11 GN...

Page 91: ...38 DDI3_DDC_AUX_SEL D38 RSVD C39 DDI3_PAIR0 D39 DDI2_PAIR0 C40 DDI3_PAIR0 D40 DDI2_PAIR0 C41 GND FIXED D41 GND FIXED C42 DDI3_PAIR1 D42 DDI2_PAIR1 C43 DDI3_PAIR1 D43 DDI2_PAIR1 C44 DDI3_HPD D44 DDI2_HPD C45 RSVD D45 RSVD C46 DDI3_PAIR2 D46 DDI2_PAIR2 C47 DDI3_PAIR2 D47 DDI2_PAIR2 C48 RSVD D48 RSVD C49 DDI3_PAIR3 D49 DDI2_PAIR3 C50 DDI3_PAIR3 D50 DDI2_PAIR3 C51 GND FIXED D51 GND FIXED C52 PEG_RX0 D...

Page 92: ...D81 PEG_TX9 C82 PEG_RX9 D82 PEG_TX9 C83 RSVD D83 RSVD C84 GND D84 GND C85 PEG_RX10 D85 PEG_TX10 C86 PEG_RX10 D86 PEG_TX10 C87 GND D87 GND C88 PEG_RX11 D88 PEG_TX11 C89 PEG_RX11 D89 PEG_TX11 C90 GND FIXED D90 GND FIXED C91 PEG_RX12 D91 PEG_TX12 C92 PEG_RX12 D92 PEG_TX12 C93 GND D93 GND C94 PEG_RX13 D94 PEG_TX13 C95 PEG_RX13 D95 PEG_TX13 C96 GND D96 GND C97 RSVD D97 RSVD C98 PEG_RX14 D98 PEG_TX14 C9...

Page 93: ... be an optional pin reserved for SML1_CLK Please contact FAE for details 9 C28 could be an optional pin reserved for SML1_DATA Please contact FAE for details 10 C29 could be an optional pin reserved for AUXDDI2_TBT_AUX Please con tact FAE for details 11 C30 could be an optional pin reserved for AUXDDI2_TBT_AUX Please contact FAE for details 12 D17 could be an optional pin reserved for DDI1_CTRLCLK...

Page 94: ...SOM 5883 User Manual 82 ...

Page 95: ...Appendix B B Watchdog Timer This appendix details information about the watchdog timer pro gramming on the SOM 5883 CPU System on Module Sections include Watchdog Timer Programming ...

Page 96: ...r from BIOS and then sets it to EC Only Win10 supports this In other OS it will still use IRQ number from BIOS setting as usual For details please refer to iManager Software API User Manual Trigger Event Note IRQ BIOS setting default disable NMI N A SCI Support Power Off Support H W Restart Support WDT Pin Activate Support ...

Page 97: ...Appendix C C Programming GPIO This Appendix illustrates the Gen eral Purpose Input and Output pin settings Sections include GPIO Register ...

Page 98: ... User Manual 86 C 1 GPIO Register For details please refer to iManager Software API User Manual GPIO Byte Mapping H W Pin Name BIT0 GPIO0 BIT1 GPIO1 BIT2 GPIO2 BIT3 GPIO3 BIT4 GPI0 BIT5 GPI1 BIT6 GPI2 BIT7 GPI4 ...

Page 99: ...ssignments This appendix gives you the infor mation about the system resource allocation on the SOM 5883 CPU System on Module Sections include System I O Ports DMA Channel Assignments Interrupt Assignments 1st MB Memory Map ...

Page 100: ...00092 0x00000092 Motherboard resources 0x000000B2 0x000000B3 Motherboard resources 0x00000680 0x0000069F Motherboard resources 0x0000164E 0x0000164F Motherboard resources 0x00000062 0x00000062 Microsoft ACPI Compliant Embedded Controller 0x00000066 0x00000066 Microsoft ACPI Compliant Embedded Controller 0x0000EFA0 0x0000EFBF Intel R SMBus 43A3 0x000003F8 0x000003FF Communications Port COM1 0x00000...

Page 101: ...COM3 0x00000040 0x00000043 System timer 0x00000050 0x00000053 System timer 0x00003000 0x0000303F Intel R UHD Graphics 0x00001854 0x00001857 Motherboard resources Table D 1 System I O Ports Table D 2 Interrupt Assignments Interrupt Interrupt Source IRQ0 System timer IRQ 27 Intel R Serial IO I2C Host Controller 43E8 IRQ 4294967294 Intel R PCI Express Root Port 5 43BC IRQ 4 Communications Port COM1 I...

Page 102: ...esources 0xFD6C0000 0xFD6CFFFF Motherboard resources 0xFD6F0000 0xFDFFFFFF Motherboard resources 0xFD6E0000 0xFD6EFFFF Intel R Serial IO GPIO Host Controller INT34C6 0xFD6D0000 0xFD6DFFFF Intel R Serial IO GPIO Host Controller INT34C6 0xFD6B0000 0xFD6BFFFF Intel R Serial IO GPIO Host Controller INT34C6 0xFD6A0000 0xFD6AFFFF Intel R Serial IO GPIO Host Controller INT34C6 0xFD690000 0xFD69FFFF Intel...

Page 103: ...0000 0x505FFFFF Intel R Ethernet Controller 3 I225 LM 0x50600000 0x50603FFF Intel R Ethernet Controller 3 I225 LM 0x0000 0xFFFFFF Intel R UHD Graphics 0x0000 0xFFFFFFF Intel R UHD Graphics 0xFFEFB000 0xFFEFBFFF Intel R Management Engine Interface 1 0xFFEFA000 0xFFEFAFFF Intel R Serial IO I2C Host Controller 43E8 Table D 3 1st MB Memory Map ...

Page 104: ...re subject to change without notice No part of this publication may be reproduced in any form or by any means such as electronically by photocopying recording or otherwise without prior written permission from the publisher All brand and product names are trademarks or registered trademarks of their respective companies Advantech Co Ltd 2022 ...

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