Advantech SOM-Express Design Guide
Chapter 5 Carrier Board Design Guidelines
43
Tskew
Tskew
Vih
Vih
Vil
Vil
Vtest
Vtest
Tskew
CLK (Device 1)
CLK (Device 2)
Figure 5-2 Clock Skew Diagram
5.1.2.3 Non-necessary Signals for Individual PCI device
A PCI device implemented directly on the carrier board uses a subset of the signals
shown on the slot connector. Some pins on the slot connector are used for slot and
PCI card management functions and are not necessary for the operation of the PCI
device itself.
An individual PCI device will not have pins REQ64, ACK64, M66EN, PRSNT1,
PRSNT2, SDONE, SBO#, or the reserved pins. Most devices do not implement the
test pins TCK, TDO, TDI, TMS, and TRST. Most PCI devices use INTA# only and do
not have a connection for INTB#, INTC# or INTD#.
5.1.2.4 Carrier Board PCI slot Power Requirements
All PCI connectors require four power rails: +5 V, +3.3 V, +12 V, and -12 V. Systems
that provide PCI connectors are required to provide all four rails in every system with
the current budget. Systems may optionally supply 3.3 Vaux power. Systems that do
not support PCI bus power management must treat the 3.3 Vaux pin as reserved.
There are no specific system requirements for current per connector on the 3.3 V and
5 V rails; this is system dependent. Note that an add-in card must limit its total power
consumption to 25 watts (from all power rails). The system provides a total power
budget for add-in cards that can be distributed between connectors in an arbitrary
way. The PRSNTn# pins on the connector allow the system to optionally assess the
power demand of each add-in card and determine if the installed configuration will
run within the total power budget.
Table 5.5 Maximum Add-in Card Loading via Each Power Rail
Power Rail
Add-in card
3.3 V+/-0.3 V
7.6 A Max (System dependent)
5 V+/- 5 %
5 A Max (System dependent)
12 V+/- 5 %
500 mA Max.
-12 V +/- 5 %
100 mA Max.
