Advantech ROM-5620, User Manual, Page: 23 / 56

15 ROM-5620 User Manual
C
ha
pte
r 3
Pin
D
efin
itio
n a
nd
Q
uic
k S
ta
rt G
uid
e
P43 SPI3_CS0# S43 -
P44 SPI3_SCK S44 -
P45 SPI3_SDI S45 -
P46 SPI3_SDO S46 -
P47 GND S47 GND
P48 - S48 MIPI_DSI1_I2C0_SCL
P49 - S49 MIPI_DSI1_I2C0_SDA
P50 GND S50 SAI0_LRCLK
P51 - S51 SAI0_SDOUT
P52 - S52 SAI0_SDIN
P53 GND S53 SAI0_CK
P54 QSPIA_CS0# S54 -
P55 QSPIA_CS1# S55 -
P56 QSPIA_SCLK S56 QSPIA_D2
P57 QSPIA_D1 S57 QSPIA_D3
P58 QSPIA_D0 S58 QSPIA_RESET#
P59 GND S59 -
P60 S60 -
P61 USB0_D- S61 GND
P62 USB0_OTG_EN_OC# S62 -
P63 USB0_VBUS_EN S63 -
P64 USB0_ID S64 GND
P65 S65 -
P66 USB1_D- S66 -
P67 USB1_EN_OC# S67 GND
P68 GND S68 -
P69 - S69 -
P70 - S70 GND
P71 USB2_EN_OC# S71 USB2_SSTX_P
P72 - S72 USB2_SSTX_N
P73 - S73 GND
P74 - S74 USB2_SSRX_P
<Key> S75 USB2_SSRX_N
P75 PCIE_A_RESET# <Key>
P76 - S76 -
P77 - S77 -
P78 - S78 -
P79 GND S79 -
P80 - S80 GND
P81 - S81 -
P82 GND S82 -
P83 PCIE_A_REF_P S83 GND
P84 PCIE_A_REF_N S84 -
P85 GND S85 -
P86 PCIE_A_RX0_P S86 GND
P87 PCIE_A_RX0_N S87 -
P88 GND S88 -
Table 3.1: MXM 3.0 Golden Finger