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ROM-5620 User Manual

14

3.1

Pin Definition

Please refer to the 314 Pin MXM golden finger following SMARC2.0/2.1 standard pin

definition detailed below:

Table 3.1: MXM 3.0 Golden Finger

Pin

Signal

Pin

Signal

P1

SMB_ALERT_1V8#

S1

MIPI_CSI0_I2C0_SCL 

P2

GND

S2

MIPI_CSI0_I2C0_SDA 

P3

MIPI_CSI0_CLK_P 

S3

GND

P4

MIPI_CSI0_CLK_N 

S4

-

P5

-

S5

-

P6

-

S6

MIPI_CSI0_MCLK_OUT

P7

MIPI_CSI0_DATA0_P

S7

-

P8

MIPI_CSI0_DATA0_N

S8

-

P9

GND

S9

-

P10

MIPI_CSI0_DATA1_P

S10

GND

P11

MIPI_CSI0_DATA1_N

S11

-

P12

GND

S12

-

P13

MIPI_CSI0_DATA2_P

S13

GND

P14

MIPI_CSI0_DATA2_N

S14

-

P15

GND

S15

-

P16

MIPI_CSI0_DATA3_P

S16

GND

P17

MIPI_CSI0_DATA3_N

S17

GB 

P18

GND

S18

GBE1_MDI0- 

P19

GBE0_MDI3- 

S19

GBE1_LED_10_100# 

P20

GB 

S20

GB 

P21

GBE0_LED_10_100#

S21

GBE1_MDI1- 

P22

GBE0_LED_1000# 

S22

GBE1_LED_1000# 

P23

GBE0_MDI2- 

S23

GB 

P24

GB 

S24

GBE1_MDI2- 

P25

GBE0_LED_ACT# 

S25

GND

P26

GBE0_MDI1- 

S26

GB 

P27

GB 

S27

GBE1_MDI3- 

P28

-

S28

-

P29

GBE0_MDI0- 

S29

-

P30

GB 

S30

-

P31

SPI3_CS1#

S31

GBE1_LINK_ACT# 

P32

GND

S32

-

P33

SDIO_WP

S33

-

P34

SDIO_CMD

S34

GND

P35

SDIO_CD#

S35

-

P36

SDIO_CK

S36

-

P37

SDIO_PWR_EN

S37

-

P38

GND

S38

AUDIO_MCLK 

P39

SDIO_D0

S39

SAI1_LRCLK 

P40

SDIO_D1

S40

SAI1_SDOUT 

P41

SDIO_D2

S41

SAI1_SDIN 

P42

SDIO_D3

S42

SAI1_CK 

Summary of Contents for ROM-5620

Page 1: ...User Manual ROM 5620 NXP i MX8X Cortex A35 SMARC 2 0 2 1 Computer on Module...

Page 2: ...ability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never need to use our repair s...

Page 3: ...ng the equip ment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation betwe...

Page 4: ...L 10A 125V 180 cm 70 8 in 170203183C Power Cord 3P Europe WS 010 WS 083 183 cm 72 in 170203180A Power Cord 3P UK 2 5A 3A 250V 183cm 72 in 1700008921 Power Cord 3P PSE 183cm 72 in SQF ISDM1 16G 21C SQF...

Page 5: ...t over voltage 12 Never pour any liquid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service...

Page 6: ...ROM 5620 User Manual vi...

Page 7: ...on 14 Table 3 1 MXM 3 0 Golden Finger 14 3 2 Quick Start Guide 17 3 2 1 Debug Port Connection 17 3 2 2 Debug Port Settings 18 Chapter 4 Software Functionality 19 4 1 Test Tools 20 4 1 1 Display Test 2...

Page 8: ...Recovery by SD Card 36 6 1 2 Recovery by UUU Tool 37 Chapter 7 Advantech Services 39 7 1 RISC Design In Services 40 7 2 Contact Information 43 7 3 Technical Support and Assistance 43 7 3 1 Warranty Po...

Page 9: ...Chapter 1 1 General Introduction This chapter briefly introduces the ROM 5620 platform Sections include Introduction Specifications...

Page 10: ...rced Linux BSP test utilities hardware design utili ties and reference drivers ROM 5620 is an excellent choice for diverse industrial automation medical Human machine Interface and portable applicatio...

Page 11: ...USB 2 0 Host 1 x USB 2 0 OTG Audio 2 x I2S SPDIF SDIO 1 Serial Port 1 x 4 wire UART and 2 x 2 wire UART SPI 2 CAN 2 CANBus 2 0 A B GPIO 12 GPIO Ports I2C 4 with interrupt Camera Input 1 x 4 Lane MIPI...

Page 12: ...ROM 5620 User Manual 4 1 4 Electrical Specifications Power Supply Voltage Voltage requirements 5 V Power Supply Current Model Kernel idle Maximum mode ROM 5620 2 46 W 4 45 W...

Page 13: ...ement off and no running any program 4 OS Yocto 2 5 5 Test software qa sh heavy loading for CPU VPU GPU 1 5 Environmental Specifications Operating Temperature 0 60 C 40 85 C 32 140 F 40 185 F The oper...

Page 14: ...ROM 5620 User Manual 6...

Page 15: ...2 H W Installation This chapter details mechanical and connector information for the ROM 5620 CPU Computer on Module Sections include Connector Information Block Diagram Functions available with ROM D...

Page 16: ...stem 2 1 1 Connector List External I O Connector SW1 1 UART Debug Port Selection SW1 2 AT ATX Mode Selection Position Description SW1 1 SW1 2 UART Debug Port selection AT ATX mode selection Setting Fu...

Page 17: ...9 ROM 5620 User Manual Chapter 2 H W Installation If SW1 1 4 is set to 1 On and reboot after the uboot message the COM3 port can be used as normal UART as displayed below...

Page 18: ...ROM 5620 User Manual 10 2 2 Block Diagram Figure 2 1 ROM 5620 Block Diagram 2 3 Functions Available for ROM DB5901 SWA1...

Page 19: ...11 ROM 5620 User Manual Chapter 2 H W Installation...

Page 20: ...ROM 5620 User Manual 12...

Page 21: ...Chapter 3 3 Pin Definition and Quick Start Guide This chapter details pin defini tions and a quick start guide...

Page 22: ...GND P14 MIPI_CSI0_DATA2_N S14 P15 GND S15 P16 MIPI_CSI0_DATA3_P S16 GND P17 MIPI_CSI0_DATA3_N S17 GBE1_MDI0 P18 GND S18 GBE1_MDI0 P19 GBE0_MDI3 S19 GBE1_LED_10_100 P20 GBE0_MDI3 S20 GBE1_MDI1 P21 GBE...

Page 23: ...SPIA_D3 P58 QSPIA_D0 S58 QSPIA_RESET P59 GND S59 P60 USB0_D S60 P61 USB0_D S61 GND P62 USB0_OTG_EN_OC S62 P63 USB0_VBUS_EN S63 P64 USB0_ID S64 GND P65 USB1_D S65 P66 USB1_D S66 P67 USB1_EN_OC S67 GND...

Page 24: ...S116 LCD1_VDD_EN P117 GPIO9 S117 MIPI_DSI1_DATA2_P P118 GPIO10 S118 MIPI_DSI1_DATA2_N P119 GPIO11 S119 GND P120 GND S120 MIPI_DSI1_DATA3_P P121 M40_I2C0_SCL S121 MIPI_DSI1_DATA3_N P122 M40_I2C0_SDA S...

Page 25: ...3_UART0_TX S140 MIPI_DSI0_I2C0_SDA P141 SER3_UART0_RX S141 MIPI_DSI0_PWM P142 GND S142 P143 CAN0_TX S143 GND P144 CAN0_RX S144 P145 CAN1_TX S145 WDT_TIME_OUT P146 CAN1_RX S146 PCIE_A_WAKE P147 VDD_IN...

Page 26: ...PuTTY can be used in this case The example below describes the serial terminal setup using HyperTerminal on a Windows host 1 Connect ROM 5620 with your PC by using a serial cable 2 Open HyperTerminal...

Page 27: ...Chapter 4 4 Software Functionality This chapter details the software programs on the ROM 5620 plat form...

Page 28: ...p 4 1 1 Display Test 4 1 1 1 Single Channel LVDS0 Single Channel LVDS1 Default The default Weston UI will be displayed on the screen LVDS0 G070VW01 V0 VDD 3 3V Backlight Power 12V Step 1 Connect 96LED...

Page 29: ...panel with LVDS cable to LVDS0 LVDS1 and Backlight cable to LVDS1_BK_PWR Step 2 Change LVDS0_VDD1 LVDS1_VDD0 jumper to 2 3 short LVDS1_BL jumper to 2 3 short Step 3 Power on Step 4 Press enter after b...

Page 30: ...4 1 1 3 MIPI DSI to HDMI with ROM EG56 on LVDS1 Step 1 Connect ROM EG56 board with cable 1700030769 01 to LVDS1 and Backlight cable to LVDS1_BK_PWR Step 2 Change LVDS1_VDD0 jumper to 1 2 short LVDS1_...

Page 31: ...plug unplug it while the DC 12V is unplugged Step 4 Press enter after boot system will stop at u boot run the command below Step 5 Weston UI will be displayed on the screen 4 1 1 4 Test Different Res...

Page 32: ...preferred driver 1920x1080 50 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags phsync pvsync type driver 1280x720 60 1280 1390 1430 1650 720 725 730 750 74250 flags phsync pvsync type driver 1280x...

Page 33: ...Power on and execute the pppd command to connect to the network amixer set Mic 100 Simple mixer control Mic 0 Capabilities volume volume joined Playback channels Mono Capture channels Mono Limits 0 3...

Page 34: ...ng 8 8 8 8 PING 8 8 8 8 8 8 8 8 56 84 bytes of data 64 bytes from 8 8 8 8 icmp_seq 1 ttl 54 time 2 10 ms 64 bytes from 8 8 8 8 icmp_seq 2 ttl 54 time 2 10 ms hciconfig hci0 up bluetoothctl discoverabl...

Page 35: ...Device audio codec 3 000a I2C set and get stty F dev ttyLP1 echo onlcr 115200 cat dev ttyLP1 echo test dev ttyLP1 enable485 dev ttyLP1 stty F dev ttyLP1 speed 115200 ignbrk brkint icrnl imaxbel opost...

Page 36: ...iver 1p 480M __ Port 1 Dev 2 If 0 Class Hub Driver hub 2p 480M __ Port 1 Dev 3 If 0 Class Mass Storage Driver usb storage 480M root imx8qxprom5620a1 dd if dev urandom of data bs 1 count 1024 dd if dev...

Page 37: ...e 0 TX packets 0 errors 0 dropped 0 overruns 0 carrier 0 Collisions 0 txqueuelen 1000 RX bytes 0 0 0 B TX bytes 0 0 0 B Eth0 0 Link encap Ethernet HWaddr 00 04 9f 01 30 e0 inet addr 192 168 0 1 Bcast...

Page 38: ...lt Direction P108 GPIO0 CAM0_PWR SC_P_SPI2_CS0_LSIO_GPIO1_IO00 448 In P109 GPIO1 CAM1_PWR SC_P_SPI2_SCK_LSIO_G PIO1_IO03 451 In P110 GPIO2 CAM0_RST SC_P_SPI2_SDI_LSIO_GPIO1_IO02 450 In P111 GPIO3 CAM1...

Page 39: ...test out test Starting wdt_driver timeout 1 sleep 2 test ioct1 Trying to set time out value 1 seconds Uboot 2018 03 5620A1AIM20LIV90064 g5ebc362 Jan 10 2020 17 39 04 0000 CPU Freescale i MX8QXP revB A...

Page 40: ...run media sda1 tpm_test bin root imx8qxprom5620a1 ls tpm_test bin root imx8qxprom5620a1 tpm_test bin TPM Command 80010000000C000001440000 TPM Response 80010000000A00000100 TPM Command 80010000000B000...

Page 41: ...Chapter 5 5 Embedded OS This chapter introduces Linux systems instructions...

Page 42: ...lopment For detailed operation please refer to Yocto Linux BSP Ver 9 User Guide for iMX8 series form Wiki page http ess wiki advantech com tw view IoTGateway BSP Linux iMX8 Yocto_L BV9_User_Guide 5 1...

Page 43: ...Chapter 6 6 System Recovery This chapter details system recov ery for damaged Linux os...

Page 44: ...to PC 3 Make a bootable SD card 4 Insert SD card and copy 5620A1AIM20LIV90064_iMX8X_flash_tool to USB disk 5 Insert USB disk and SD card then boot the whole system from SD card by changing SW1 on ROM...

Page 45: ...Set the correct boot mode on ROM DB5901 SW1 with 4ON turn every other pin OFF then power the system on 4 Connect the PC OTG cable 1700023619 01 f to ROM DB5901 USB_OTG1 Perform the following command 5...

Page 46: ...ROM 5620 User Manual 38...

Page 47: ...Chapter 7 7 Advantech Services This chapter details Advantech s Design In serviceability technical support and warranty policy for the ROM 5620 evaluation kit...

Page 48: ...for customers These help customers develop their carrier board and differentiate their embedded products and applications Full range of RISC products Comprehensive document support Design Assistance S...

Page 49: ...especially when integrating CPU modules into carrier boards The Acquisition of Information Despite obtaining sufficient information for making decisions concerning specialized vertical applications so...

Page 50: ...ecommendations for carrier board design This design guide gives customers clear guidelines during their carrier board develop ment Advantech offers a complete pin out check list for different form fac...

Page 51: ...elf products and third party off the shelf products used to assemble Configure to Order products are entitled to a two year complete and prompt global warranty service Product defects in design materi...

Page 52: ...2 Repair Process 7 3 2 1 Obtaining an RMA Number All returns from customers must be authorized with an Advantech RMA Return Mer chandise Authorization number Any returns of defective units or parts wi...

Page 53: ...ted Should DOA cases fail Advantech will take full responsibility for the product and transportation charges If the items are not DOA but fail within warranty the sender will bear the freight charges...

Page 54: ...not caused by Advantech design or manufacturing customers will be charged US 60 or US 120 for in warranty or out of warranty repair analysis reports respectively 7 3 2 5 Custody of Products Submitted...

Page 55: ...47 ROM 5620 User Manual Chapter 7 Advantech Services...

Page 56: ...ions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion fro...

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