PCI-6881 User Manual
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Chapter 3 Software Configuration
3.1 Introduction
The system BIOS and custom drivers are located in a 512 KB, 32-pin
(JEDEC spec.) Flash ROM device, designated U15. A single Flash chip
holds the system BIOS, VGA BIOS, and network Boot ROM image. The
display can be configured via software. This method minimizes the num-
ber of chips and eases configuration. You can change the display BIOS
simply by reprogramming the Flash chip.
3.2 VGA display firmware configuration
The onboard VGA interface supports a wide range of popular LCD, EL,
gas plasma flat panel displays and traditional analog CRT monitors. The
855GME chip with optimized Shared Memory Architecture, supports up
to 32 MB frame buffer using system memory to provide LVDS mode up
to UXGA panel resolution with frequency range from 25 MHz to 112
MHz, the interface can drive CRT displays with resolutions up to 2048 x
1536 @ 75 Hz.
The VGA interface is configured completely via the software utility, so
you do not have to set any jumpers. Configure the VGA display as fol-
lows:
1.
Apply power to the board with a color TFT display attached. This
is the default setting for this board. Ensure that the AWD-
FLASH.EXE and *.BIN files are located in the working drive.
NOTE:
Ensure that you do not run AWDFLASH.EXE
while your system is operating in EMM386
mode.
Summary of Contents for PCI-6881 Series
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