PCI-1714 & 1714UL User Manual
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2. Two channels CH0 + CH1
3. Four channels CH0 + CH1 + CH2 + CH3
C.19 DMA Request Selector- Write BASE+34
DS0
DMA Request selector
This bit select the DMA request (hardware signal DREQ), user could use
FIFO 0 flag or FIFO 2 flag to generate DREQ.
0
FIFO 0 flag
1
FIFO 2 flag
Memory Address
D31
D16
D15
D0
N
CH1 data 0
CH0 data 0
N+1
CH1 data 1
CH0 data 1
N+2
CH1 data 2
CH0 data 2
N+3
CH1 data 3
CH0 data 3
:
:
:
Memory Address
D31
D16
D15
D0
N
CH1 data 0
CH0 data 0
N+1
CH3 data 0
CH2 data 0
N+2
CH1 data 1
CH0 data 1
N+3
CH3 data 1
CH2 data 1
:
:
:
Table C.21: Register for DMA Request Selector
Base
Address
+ HEX
PCI-1714 Register Format
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
34h W
DMA Request selector
DS0
Summary of Contents for PCI-1714
Page 8: ...PCI 1714 1714L User Manual viii...
Page 13: ...5 Chapter1 Figure 1 1 Installation Flow Chart...
Page 18: ...PCI 1714 1714UL User Manual 10...
Page 34: ...PCI 1714 1714UL User Manual 26...
Page 52: ...PCI 1714 1714UL User Manual 44...
Page 53: ...2 APPENDIX A Specifications...
Page 56: ...PCI 1714 1714UL User Manual 48...
Page 57: ...2 APPENDIX B Block Diagram...
Page 58: ...PCI 1714 1714UL User Manual 50 Appendix B Block Diagram...