Advantech PCA-6151, Manual, Page: 36 / 46

28 PCA-6155 User's Manual
CHIPSET features setup
By choosing the “CHIPSET FEATURES SETUP” option from the
INITIAL SETUP SCREEN Menu, the screen below is displayed.
This sample screen contains the manufacturer’s default values for
the PCA-6151.
ROM PCI/ISA BIOS (2A5IFAK9)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration : Enabled Slow Refresh (1:4) : Enabled
L2 Cache Update Mode : WB System BIOS Cache : Enabled
L2 (WB) Tag Bit Length : 7bits Video BIOS Cache : Enabled
SRAM Back to Back : Enabled Memory Hole 15M-16M : Disabled
SRAM Leadoff Timing : 3 Ck CPU-PCI Post Wr. rate : 4 Ck
DRAM Leadoff Timing : 6 Ck Latency for CPU-PCI : 1 Ck
MDLE Delay Timing (ns) : 4 CPU-PCI Burst Write : Disabled
DRAM RAS to CAS Delay : 3 Ck CPU-PCI Post Write : Enabled
RAS Active When Refresh : 5 Ck VGA Shared Mem Size : 1 MB
CAS Delay in Posted-WR : 1 Ck VGA Mem Clock (MHz) : 55
FP DRAM CAS Pr. Timing : 1 Ck Linear SRAM Support : Disabled
FP DRAM RAS Pr. Timing : 3 Ck
EDO CAS Pulse Width
: R1 W2 Ck
EDO CAS Precharge Time : 1 Ck
EDO MDLE Timing
: 1 Ck
EDO BRDY# Timing : 1 Ck Esc : Quit
↑↓→←
: Select Item
EDO RAS Prech. Timing : 3 Ck F1 : Help PU/PD/+/- : Modify
EDO RAMW# Pwr Saving : Disabled F5 : Old Values <Shift>F2 : Color
ISA Bus Clock Frequency : PCICLK/4 F6 : Load BIOS Defaults
F7 : Load Setup Defaults
CHIPSET features setup
Note: If you enable the IDE HDD block mode, the
enhanced IDE driver will be enabled.