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Advantech MIO-5272, User Manual

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53

MIO-5272 User Manual

Appendix A

P

in Assignments

 

CN10

GPIO

Part Number

1653004099

Footprint

HD_5x2P_79_23N685B-10M10

Description

BOX HEADER 5x2P 2.00mm 180D(M) SMD 23N685B-10M10

Pin

Pin Name

1

+5V

2

GPIO4

3

GPIO0

4

GPIO5

5

GPIO1

6

GPIO6

7

GPIO2

8

GPIO7

9

GPIO3

10

GND

CN11

SATA

Part Number

1654007578

Footprint

SATA_7P_WATF-07DBN6SB1U

Description

Serial ATA 7P 1.27mm 180D(M) SMD WATF-07DBN6SB1U

Pin

Pin Name

1

GND

2

TX+

3

TX-

4

GND

5

RX-

6

RX+

7

GND

Summary of Contents for MIO-5272

Page 1: ...ilures or damages immediate or consequential resulting from the use of the information provided herein Our products are not intended for use in systems in which failures of product could result in per...

Page 2: ...User Manual MIO 5272 6thGenIntel Core U series i7 i5 i3 Celeron 3 5 MI O Compact SBC DDR3L VGA HDMI 48 bit LVDS 2 GbE 2 Mini PCIe mSATA Fanless MIOe...

Page 3: ...ponsibility for its use nor for any infringe ments of the rights of third parties which may result from its use Acknowledgements Intel is a trademark of Intel Corporation AMI is a trademark of America...

Page 4: ...cost of replacement materials service time and freight Please consult your dealer for more details If you think you have a defective product follow these steps 1 Collect all the information about the...

Page 5: ...nications Opera thin of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Technical Su...

Page 6: ...0 AE 2 Port CAN Bus MIOe Module with Isolation Protection MIOE PWR1 00A1E 12 24V Power module MIOE PWR2 00A1E 9 36V Power module 1 No USB support on MIOe 230 2 Support with customized BIOS Optional Ac...

Page 7: ...MIO 5272 User Manual vi...

Page 8: ...10 2 3 Locating connectors block diagram 11 Figure 2 1 MIO 5272 Connector Locations Top Side 11 Figure 2 2 MIO 5272 Connector Locations Bottom Side 11 Figure 2 3 MIO 5272 Connector Locations Coastline...

Page 9: ...49 A 1 Jumper Switch List and Setting 50 Appendix B System Assignments 77 B 1 System I O Ports 78 Table B 1 System I O Ports 78 B 2 DMA Channel assignments 78 Table B 2 DMA Channel assignments 78 B 3...

Page 10: ...Chapter 1 1 General Information This chapter gives background information on the MIO 5272 Sections include Introduction Specifications Block diagram Board layout and dimensions...

Page 11: ...penCL 2 1 and 4K encoding decod ing which increases more possibilities for multimedia application development MIO 5272 supports not only triple independent displays including HDMI VGA and 48 bit LVDS...

Page 12: ...enCL2 1 support DirectX 12 DirectX 11 3 DirectX 11 2 DirectX 11 1 DirectX 10 DirectX 9 support Multi display interfaces VGA HDMI on rear I O Dual Channel 24 bit LVDS DisplayPort1 from MIOe Support Ext...

Page 13: ...ini PCIe mSATA 1 Full size mSATA Mini PCIe default supports mSATA One Mini PCIe default supports mSATA can be selected in BIOS 1 Half size Mini PCIe with SIM card holder High Definition Audio Intel Hi...

Page 14: ...nt value which system under maxi mum load CPU Top speed RAM Graphic Full loading Idle mode Measure the current value when system in windows mode and without running any program RTC Battery Typical Vol...

Page 15: ...SPI UART PHY Intel i219 PCIe x 1 Advantech iManager Skylake U SMBus I2 C SMBus I2 C Interface GbE Intel i210 Audio In Out 48 bit LVDS connector DP Dual Channel 2 SATA Ports SATA 6Gb s Full szie miniP...

Page 16: ...7 MIO 5272 User Manual Chapter 1 General Information Figure 1 2 MIO 5272 Mechanical Drawing Bottom Side Figure 1 3 MIO 5272 Mechanical Drawing Coastline...

Page 17: ...MIO 5272 User Manual 8 Figure 1 4 MIO 5272 Mechanical Drawing with Heatsink Figure 1 5 MIO 5272 Mechanical Drawing with Heat Spreader...

Page 18: ...r explains the setup procedures of the MIO 5272 hard ware including instructions on setting jumpers and connecting peripherals switches and indica tors Be sure to read all safety pre cautions before y...

Page 19: ...onnectors Table 2 1 Jumpers Switches J1 Auto Power On Setting J2 LCD Power SW2 Clear CMOS Table 2 2 Connectors Label Function CN1 12V Power Input CN2 DC JACK Support by request CN4 Battery CN5 DDR3L S...

Page 20: ...48 bit LVDS 2 x SATA 2x 2 Power Input or DC Jack PWR HDD LED GbE1 GbE2 HDMI VGA 2 x USB3 0 2 0 2 x DDR3L SO DIMM Power Switch Reset Inverter Power Output SATA Power Support by request SMBus J1 System...

Page 21: ...e three pins labeled 1 2 and 3 In this case you would connect either pins 1 and 2 or 2 and 3 The jumper settings are schematically depicted in this manual as follows A pair of needle nose pliers may b...

Page 22: ...Chapter 2 Installation 2 4 2 LCD Power J2 1 3 3 5 3 4 2 4 3 Clear CMOS SW2 1 2 2 3 Table 2 4 LCD Power J2 Setting Function 1 3 3 3V Default 3 5 5V 3 4 12V Table 2 5 Clear CMOS SW2 Setting Function 1...

Page 23: ...MIO 5272 User Manual 14...

Page 24: ...Chapter 3 3 AMI BIOS Setup...

Page 25: ...the various sys tem features This chapter describes the basic navigation of the MIO 5272 BIOS setup screens Figure 3 1 Setup program initial screen AMI s BIOS ROM has a built in Setup program that all...

Page 26: ...has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key leg...

Page 27: ...in the left frame of the screen such as CPU Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arrow keys All Advanced BIOS Se...

Page 28: ...to configuration Enable Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select the highest ACPI sleep state...

Page 29: ...ithout password Configuration Prompt MEBx Debug Message Output Enable MEBx debug message output Un Configure ME Un Configure ME without password Amt Wait Timer Set timer to wait before sending ASF_GET...

Page 30: ...nfiguration This page display all information about system ME FW ME Unconfig on RTC Clear State Disabling this option will cause ME not to unconfigure on RTC clear ME State Set ME to Soft Temporary Di...

Page 31: ...ht Enable Polarity This item allows users to set backlight mode 1st LVDS Backlight control This item allows users to switch Backlight Control for PWM or DC mode Power Saving Mode This item allows user...

Page 32: ...les or Disables BIOS support for security device O S will not show Security Device TCG EFI protocol and INT1A interface will not be available 3 2 1 6 S5 RTC Wake Settings Wake system from S5 Enable or...

Page 33: ...e Redirection Console Redirection This item allows users to enable or disable console redirection for Microsoft Windows Emergency Management Services EMS Console Redirection This item allows users to...

Page 34: ...m allows users to enable or disable the hardware prefetcher feature Adjacent Cache Line Prefetch This item allows users to enable or disable the adjacent cache line prefetch feature CPU AES Enable Dis...

Page 35: ...User Manual 26 Package C State limit Package C State limit SW Guard Extension SGX Enable Disable Software Guard Extensions SGX 3 2 1 9 Intel TXT Information Intel TXT Information Display Intel TXT inf...

Page 36: ...ser Manual Chapter 3 AMI BIOS Setup 3 2 1 10 Platform Misc Configuration Native PCIE Enable PCI Express Native Support Enable Disable Native ASPM PCI Express Native ASPM Enable Disable 3 2 1 11 SATA C...

Page 37: ...ggressive LPM Support Enable PCH to aggressively enter link power state Port 1 Port 2 mSATA Port Enable Disable Serial ATA Port 1 Port 2 mSATA Port SATA Device type Identify the SATA port is connected...

Page 38: ...de for Option ROM INT19 Trap Response BIOS reaction on INT19 trapping by Option ROM IMMEDIATE execute the trap right away POSTPONED execute the trap during legacy boot Boot option filter This option c...

Page 39: ...river Support Enable Disable USB Mass Storage Driver Support Port 60 64 Emulation Enables I O port 60h 64h emulation support This should be enabled for the complete USB keyboard legacy support for non...

Page 40: ...2 User Manual Chapter 3 AMI BIOS Setup 3 2 1 15 IT8768E Super I O Configuration Serial Port 1 Configuration Set Parameters of Serial Port 1 COMA Serial Port 2 Configuration Set Parameters of Serial Po...

Page 41: ...setup screen to enter the Chipset BIOS Setup screen You can display a Chipset BIOS Setup option by highlighting it using the Arrow keys All Plug and Play BIOS Setup options are described in this sec t...

Page 42: ...p 3 2 2 1 System Agent SA Configuration Figure 3 6 System Agent SA Configuration VT d VT D capability CRID Support Enable Disable CRID control for Intel SIPP Above 4GB MMIO BIOS assignment Enable Disa...

Page 43: ...rted Aperture Size Select the Aperture Size DVMT Pre Allocated Select DVMT 5 0 Pre Allocated Fixed Graphics Memory size used by the Internal Graphics Device DVMT Total Gfx Mem Select DVMT 5 0 Total Gr...

Page 44: ...ill be activated during POST This has no effect if an external graphics present Secondary boot display selection will appear based on your selection VGA modes will be supported only on primary display...

Page 45: ...aximum Memory Frequency Selections in Mhz Max TOLUD Maximum Value of TOLUD SA GV System Agent Geyserville SA GV Low Freq System Agent Geyserville Set frequency for low point Energy Performance Gain En...

Page 46: ...Manual Chapter 3 AMI BIOS Setup 3 2 2 5 GT Power Management Control RC6 Render Standby Check to enable render standby support 3 2 2 6 PCH IO Configuration PCI Express Configuration PCI Express Config...

Page 47: ...or CN25 PCH LAN Controller Enable or Disable onboard NIC LAN Option ROM Enable or Disable onboard LAN s PXE option ROM Wake on LAN Enable or Disable Integrated LAN to wake the system from S5 Onboard L...

Page 48: ...Gating Enable or disable PCI Express Clock Gating for each root port DMI Link ASPM Control Enable Disable the control of Active State Power Management on SA side of the DMI Link Peer Memory Write Ena...

Page 49: ...ondition work on USB host controller and root ports for faster enumeration XHCI Disable Compliance mode Option to disable Compliance Mode USB Port Disable Override Selectively Enable Disable the corre...

Page 50: ...3 AMI BIOS Setup 3 2 2 9 BIOS Security Configuration RTC Lock Enable will lock bytes 38h 3Fh in the lower upper 128 byte bank of RTC RAM BIOS Lock Enable or Disable the PCH BIOS Lock Enable feature 3...

Page 51: ...HD Audio Control Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally Enabled 3 2 2 11 SB Porting Configuration SATA RAID ROM Run the Leg...

Page 52: ...2 Setup main BIOS setup menu All Security Setup options such as password protection and virus protection are described in this section To access the sub menu for the following items select the item an...

Page 53: ...are will wait for user input before booting This means the default boot selection is not automatically started by the firmware Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enables...

Page 54: ...take effect all system configuration parameters Discard Changes and Reset Select this option to quit Setup without making any permanent changes to the system configuration and reboot the computer Save...

Page 55: ...have completed system configuration select this option to save changes as user defaults without exit BIOS setup menu Restore User Defaults The users can select this option to restore user defaults Bo...

Page 56: ...Chapter 4 4 MIOe Installation...

Page 57: ...ur thermal design and MIOe module installation 4 1 Quick Installation Guide 1 There is a Heatsink Cooler in the white box inside the package Carefully remove the release paper from the thermal pad bef...

Page 58: ...Appendix A A Pin Assignments This appendix contains informa tion of a detailed or specialized nature Sections include Jumper and Connector Tables...

Page 59: ...W O Pb Setting Function 1 2 Auto Power On default J2 LCD Power Part Number 1653003260 Footprint HD_3x2P_79 Description PIN HEADER 3x2P 2 0mm 180D M SMD 21N22050 Setting Function 1 3 3 3V default 3 5 5...

Page 60: ...RCONN 2x2P 4 2mm 90D M DIP 740 77 04TS50 Pin Pin Name 1 GND 2 GND 3 12V 4 12V CN2 DC JACK Support by request Part Number 1652005278 Footprint PJ_2P_2DC G213B200 Description Pin Pin Name 1 12V 2 GND 3...

Page 61: ...DR3L SO DIMM_2 Part Number 1651002087 11 Footprint DDR3_204P_AS0A626 N2S6 7H CN8 Power Switch Part Number 1655302020 Footprint WF_2P_79_BOX_R1_D Description WAFER BOX 2P 2 0mm 180D M DIP A2001WV2 2P P...

Page 62: ...ription BOX HEADER 5x2P 2 00mm 180D M SMD 23N685B 10M10 Pin Pin Name 1 5V 2 GPIO4 3 GPIO0 4 GPIO5 5 GPIO1 6 GPIO6 7 GPIO2 8 GPIO7 9 GPIO3 10 GND CN11 SATA Part Number 1654007578 Footprint SATA_7P_WATF...

Page 63: ...7DBN6SB1U Description Serial ATA 7P 1 27mm 180D M SMD WATF 07DBLSB1UW Pin Pin Name 1 GND 2 TX 3 TX 4 GND 5 RX 6 RX 7 GND CN13 SATA Power Part Number 1655001154 Footprint WF_4P_98_BOX_R1_D Description...

Page 64: ...Pin Pin Name 1 WAKE 2 3 3VSB 3 NC 4 GND 5 NC 6 1 5V 7 CLK_MIN1_z_REQ 8 VUIM_PWR 9 GND 10 UIM_DATA 11 REFCLK 12 UIM_CLK 13 REFCLK 14 UIM_RESET 15 GND 16 VUM_VPP 17 NC 18 GND 19 NC 20 W_DISABLE 21 GND 2...

Page 65: ...MIO 5272 User Manual 56 43 GND 44 NC 45 NC 46 NC 47 NC 48 1 5V 49 NC 50 GND 51 NC 52 3 3VSB...

Page 66: ...B226 S68N7H Pin Pin Name 1 WAKE 2 3 3VSB 3 NC 4 GND 5 NC 6 1 5V 7 NC 8 UIM_PWR 9 GND 10 UIM_DATA 11 REFCLK 12 UIM_CLK 13 REFCLK 14 UIM_RESET 15 GND 16 UIM_VPP 17 NC 18 GND 19 NC 20 W_DISABLE 21 GND 22...

Page 67: ...MIO 5272 User Manual 58 43 SEL 44 NC 45 NC 46 NC 47 NC 48 1 5V 49 NC 50 GND 51 NC 52 3 3VSB...

Page 68: ...IM_6P_5210622 SINR03 Description Pin Pin Name C1 UIM_PWR C2 UIM_RESET C3 UIM_CLK C5 GND C6 UIM_VPP C7 UIM_DATA CN16 External USB2 0 USB3 0 Part Number 1654010199 Footprint USB_13P_UEA1112C UHS6 4F Des...

Page 69: ...272 User Manual 60 CN17 External USB2 0 USB3 0 Part Number 1654010199 Footprint USB_13P_UEA1112C UHS6 4F Description Pin Pin Name 1 5V 2 D 3 D 4 GND 5 SSRX 6 SSRX 7 GND 8 SSTX 9 SSTX 10 5V 11 D 12 D 1...

Page 70: ...1 COM2 Part Number 1653004793 Footprint HD_10x2P_79_23N685B 20M10 Description BOX HEADER 10x2P 2 0mm 180D M SMD 23N685B 20M10B Pin Pin Name 1 DCD1 2 DSR1 3 RXD1 4 RTS1 5 TXD1 6 CTS1 7 DTR1 8 RI1 9 GND...

Page 71: ...80D M SMD 23N685B 20M10B Pin Pin Name 1 COM3_485 422_TXN DCD 2 COM3_z_DSR 3 COM3_485 422_TXP RXD 4 COM3_z_RTS 5 COM3_422__RXP TXD 6 COM3_z_CTS 7 COM3_422__RXN DTR 8 COM3_z_RI 9 GND 10 GND 11 COM4_485...

Page 72: ...0M10 Description BOX HEADER 10x2P 2 0mm 180D M SMD 23N685B 20M10B Pin Pin Name 1 422TX 1 485D 1 DCD 1 2 DSR 1 3 422TX 1 485D 1 RXD 1 4 RTS 1 5 422RX 1 TXD 1 6 CTS 1 7 422RX 1 DTR 1 8 RI 1 9 GND 10 GND...

Page 73: ...art Number 1652003274 Footprint RJ45_28P_RTB 19GB9J1A Description PHONE JACK RJ45 28P DIP RTB 19GB9J1A Pin Pin Name 1 TX 10 100 BI_DA GHz 2 TX 10 100 BI_DA GHz 3 RX 10 100 BI_DB GHz 4 BI_DC GHz 5 BI_D...

Page 74: ...N685B 10M10 Pin Pin Name 1 LOUTR 2 LINR 3 GND 4 GND 5 LOUTL 6 LINL 7 GND 8 GND 9 MIC1R 10 MIC1L CN24 External USB3 0 2 Part Number 1654011725 01 Footprint USB_9x2P_WDU3R 18F3B4PBUW3 Description Double...

Page 75: ...66 CN25 External USB2 0 2 Part Number 1654010634 01 Footprint USB_8P_ABA USB 014 K01 Description USB Conn 8P 2 5mm 90D M DIP ABA USB 014 K01 Pin Pin Name 1 5V 2 D 3 D 4 GND 5 V5 6 D 7 D 8 GND 9 GND 1...

Page 76: ...N HEADER 2x5P 2 0mm 180D M SMD 21N22050 Pin Pin Name 1 5V 2 5V 3 A_D 4 B_D 5 A_D 6 B_D 7 GND 8 GND 9 GND CN27 VGA Part Number 1654011261 01 Footprint DBVGA VF5MS Description D sub 15P 90D F DIP G F HD...

Page 77: ...D Pin Pin Name 1 GND 2 GND 3 PCIE_RX0 4 PCIE_TX0 5 PCIE_RX0 6 PCIE_TX0 7 GND 8 GND 9 NC 10 NC 11 NC 12 NC 13 GND 14 GND 15 NC 16 NC 17 NC 18 NC 19 GND 20 GND 21 NC 22 NC 23 NC 24 NC 25 GND 26 GND 27...

Page 78: ...DDP_AUX 52 NC 53 GND 54 LPC_SERIRQ 55 DDP_D0 56 LPC_FRAME 57 DDP_D0 58 GND 59 GND 60 USB0_D 61 DDP_D1 62 USB0_D 63 DDP_D1 64 GND 65 GND 66 USB1_D 67 DDP_D2 68 USB1_D 69 DDP_D2 70 GND 71 GND 72 USB2_D...

Page 79: ...MIO 5272 User Manual 70 CN29 SMBus Part Number 1655904020 Footprint FPC4V 125M Description WAFER 4P 1 25mm 180D M SMD 85205 04001 Pin Pin Name 1 GND 2 SMB_DAT 3 SMB_CLK 4 5V...

Page 80: ...2 GND 3 ENABKL 4 PWM 5 5V CN26 48 bits LVDS Panel Part Number 1653920200 Footprint SPH20X2 Description B B Conn 40P 1 25mm 90D SMD DF13 40DP 1 25V 91 Pin Pin Name 1 V_LCD 2 V_LCD 3 GND 4 GND 5 V_LCD 6...

Page 81: ...MIO 5272 User Manual 72 26 LVDS1_CLK 27 LVDS0_CLK 28 LVDS1_CLK 29 GND 30 GND 31 NC 32 NC 33 GND 34 GND 35 LVDS0_D3 36 LVDS1_D3 37 LVDS0_D3 38 LVDS1_D3 39 NC 40 NC...

Page 82: ...cription HDMI Conn 19P 90D M DIP R3660019 X02 R Pin Pin Name 1 TMDS Data2 2 TMDS Data2 Shield 3 TMDS Data2 4 TMDS Data1 5 TMDS Data1 Shield 6 TMDS Data1 7 TMDS Data0 8 TMDS Data0 Shield 9 TMDS Data0 1...

Page 83: ...MIO 5272 User Manual 74 FAN1 System FAN Part Number 1655003010 Footprint WHP3VA Description Pin Pin Name 1 GND 2 V12 3 N C...

Page 84: ...75 MIO 5272 User Manual Appendix A Pin Assignments...

Page 85: ...MIO 5272 User Manual 76...

Page 86: ...Appendix B B System Assignments This appendix contains informa tion of a detailed nature Sections include System I O Ports DMA Channel Assignments 1st MB Memory Map Interrupt Assignments...

Page 87: ...ces C0 DF DMA controller 299 29A EC HM Index port and Data port 29C 29D EC Index port and Data port 2F8 2FF Communications Port COM2 3C0 3DF Motherboard resources 3F8 3FF Communications Port COM1 4D0...

Page 88: ...timer IRQ1 Using SERIRQ Keyboard Emulation IRQ2 Interrupt from controller 2 cascade IRQ3 Communications Port COM2 IRQ4 Communications Port COM1 IRQ5 EC Watch DOG IRQ6 Available IRQ7 Available IRQ8 Sy...

Page 89: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

Page 90: ...echnology Ltd 5 The Oaks Business Village Revenge Road Lordswood Chatham Kent ME5 8LF United Kingdom Phone 44 0 1634 67 27 55 Fax 44 0 1634 67 27 54 E Mail info displaytechnology co uk Internet www da...

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