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Advantech MIO-2260, User Manual

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21

MIO-2260 User Manual

Chapter 3

B

IOS settings

3.3.1

CPU Configuration 

Figure 3.4 CPU Configuration Setting 

Max CPUID Value Limit

This item allows you to limit CPUID maximum value.

Execute-Disable Bit Capability

This item allows you to enable or disable the No-Execution page protection technol-
ogy.

Hyper Threading Technology

This item allows you to enable or disable Intel? Hyper Threading technology.

Intel® C-STATE tech

This item allows the CPU to save more power under idle mode.

Enhanced C-States

CPU idle set to enhanced C-States, disabled by Intel? C-STATE tech item.

Summary of Contents for MIO-2260

Page 1: ...User Manual MIO 2260 MI O Ultra SBC with Intel Atom N455 DDR3 18 bit LVDS VGA GbE Mini PCIe 2 COM 2 USB MIOe...

Page 2: ...or for any infringements of the rights of third parties which may result from its use Acknowledgements AMI is a trademark of AMI Software International Inc Intel is a trademark of Intel Technologies I...

Page 3: ...used etc Note anything abnormal and list any onscreen messages you get when the problem occurs 2 Call your dealer and describe the problem Please have your manual product and any helpful information...

Page 4: ...reader 99 5 x 70 5 x 11 2 mm Part Number Description 1700006291 SATA cable 7P 30 cm w right angle 1700019156 Audio Cable 2 5P 2 0 JACK 2 20cm 1701200220 COM PORT cable 2 10P 2 0 D SUB 9P M 2 22 cm 170...

Page 5: ...adiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Opera tion of this device in a residential...

Page 6: ...MIO 2260 User Manual vi...

Page 7: ...ocations 12 Figure 2 1 Jumper and Connector layout Top side 12 Figure 2 2 Jumper and connector layout Bottom side 13 2 3 2 Board Dimensions 13 Figure 2 3 Board dimension layout Top side 13 Figure 2 4...

Page 8: ...top 33 3 5 Boot Settings 34 Figure 3 20Boot Setup Utility 34 3 5 1 Boot settings Configuration 35 Figure 3 21Boot Setting Configuration 35 3 6 Security Setup 36 Figure 3 22Password Configuration 36 3...

Page 9: ...t Panel 60 Table A 12 CN9 Mini PCIE 61 Table A 13 CN10 MIO 3 0 62 Table A 14 CN11 CF 65 Table A 15 CN12 SATA 66 Table A 16 CN13 LAN 67 Table A 17 CN14 External USB 67 Table A 18 CN15 12V Power Input 6...

Page 10: ...MIO 2260 User Manual x...

Page 11: ...Chapter 1 1 General Introduction This chapter gives background information on the MIO 2260 Sections include Introduction Product feature Specifications...

Page 12: ...firmware applica tions 1 2 Product Feature General CPU Intel Atom processor N455 1 66 GHz System Chipset Intel Atom N455 ICH8M BIOS SPI 16 Mbit Flash BIOS System Memory DDR3 667 MHz N455 up to 2 GB C...

Page 13: ...M Supports one CF device H D Codec ALC892 I F ICH8M supports Support for HD codec Up to 2 channel of PCM Pulse Code Modulation audio out put Connectors Line out Line in Pin header 2 5P M 2 0 mm Concur...

Page 14: ...wafer box 1 25mm CRT connector D SUB15 at coastline Ethernet ICH8M Intel 82567V PHY Compliant with IEEE 802 3 IEEE 802 3u IEEE 802 ab Support 1000Mbps Connectors Phone Jack RJ45 8P 90D F Serial ports...

Page 15: ...ith 1 GB memory Typical in XP mode 0 64 A 12 V Max in HCT 0 86 A 12 V 1 3 3 3 RTC Battery Typical Voltage 3 0 V Normal discharge capacity 210 mAh 1 4 Environmental Specifications 1 4 1 Operating Humid...

Page 16: ...MIO 2260 User Manual 6...

Page 17: ...e setup procedures of the MIO 2260 hard ware including instructions on setting jumpers and connecting peripherals as well as switches indicators and mechanical draw ings Be sure to read all safety pre...

Page 18: ...tically depicted in this manual as follows A pair of needle nose pliers may be helpful when working with jumpers If you have any doubts about the best hardware configuration for your application conta...

Page 19: ...serial messages using the SMBus protocols allowing multiple simultaneous device control 2 2 2 3 COM Port Connector CN2 The MIO 2260 provides 2 RS 232 serial ports in 10 2pin pin header You can find t...

Page 20: ...oard and 5V for 2 5 SATA HDD via CN6 SATA power s current is only sufficient for 2 5 HDD and LVDS inverter s current is 5 V less than 1 A 12 V 500 mA 2 2 2 8 GPIO General Purpose Input Output CN7 The...

Page 21: ...via the BIOS settings Compact Flash set as fix master mode 2 2 2 13 SATA Connector CN12 MIO 2260 supports Serial ATA via one connector CN12 Data transfer rates up to 300 MB s are possible enabling ve...

Page 22: ...l devices The USB interfaces comply with USB specification Rev 2 0 which supports 480 Mbps transfer rate and are fuse protected 2 2 2 16 Power Connectors CN15 Main power connector supports single 12V...

Page 23: ...13 MIO 2260 User Manual Chapter 2 H W Installation Figure 2 2 Jumper and connector layout Bottom side 2 3 2 Board Dimensions 2 3 2 1 CPU Board Drawing Figure 2 3 Board dimension layout Top side...

Page 24: ...MIO 2260 User Manual 14 Figure 2 4 Board dimension layout Bottom side Figure 2 5 Board dimension layout Coastline with power connector...

Page 25: ...oard it s recommended to refer to the following drawing of MI O module height constraint Figure 2 7 MI O Module height constraint Note 1 Constraint of components max height of MI O module base on 16mm...

Page 26: ...ould be the smaller the better 2 The height of exsting heat spreader is 11 2mm Advantech P N 1960053176T001 If you need some other height to fit chassis better Advan tech could custormize it for you P...

Page 27: ...Chapter 3 3 BIOS settings...

Page 28: ...nfiguration This information is stored in battery backed CMOS so it retains the Setup information when the power is turned off 3 1 Entering Setup Turn on the computer and check for the patch code If t...

Page 29: ...the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text message When...

Page 30: ...n the left frame of the screen such as CPU Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arrow keys All Advanced BIOS Set...

Page 31: ...cute Disable Bit Capability This item allows you to enable or disable the No Execution page protection technol ogy Hyper Threading Technology This item allows you to enable or disable Intel Hyper Thre...

Page 32: ...detec tion of IDE device Type Select the type of SATA driver Not Installed Auto CD DVD ARMD LBA Large Mode Enables or Disables the LBA mode Block Multi Sector Transfer Enables or disables data multi s...

Page 33: ...Super I O Configuration Serial Port1 Port2 address This item allows you to select serial port1 port2 of base addresses Serial Port1 Port2 IRQ This item allows you to select serial port1 port2 of IRQ...

Page 34: ...3 4 Hardware Health Configuration Figure 3 7 Hardware health configuration H W Health Function This item allows you to control H W monitor of showing Temperature Voltage show CPU System Temperature Vc...

Page 35: ...PI Settings Figure 3 8 ACPI Settings 3 3 5 1 General ACPI Configuration Figure 3 9 General ACPI Configuration Suspend mode Select the ACPI state used for system suspend Report Video on S3 Resume This...

Page 36: ...Version Features This item allows you to enable RSDP pointers to 64 bit fixed system description tables ACPI APIC support Include APIC table pointer to RSDT pointer list AMI OEMB table Include OEMB t...

Page 37: ...ACPI Configuration Energy Lake Feature Allows you to configure Intel s Energy Lake power management technology APIC ACPI SCI IRQ Enable Disable APIC ACPI SCI IRQ USB Device Wakeup From S3 Enable Disa...

Page 38: ...ration Figure 3 12 Advanced ACPI Configuration AHCI Ports0 Port1 While entering setup BIOS auto detects the presence of IDE devices This displays the status of auto detection of IDE device 3 3 7 APM C...

Page 39: ...the system powered off after power failure the On setting boots up the system after failure and the Last State returns the system to the status just before power failure Resume On PME Enable Disable P...

Page 40: ...Configuration Figure 3 15 MPS Configuration MPS Revision This item allows you to select MPS reversion 3 3 10 Smbios Configuration Figure 3 16 Smbios Configuration Smbios Smi Support SMBIOS SMI wrapper...

Page 41: ...nnected USB 2 0 Controller Mode This item allows you to select HiSpeed 480Mbps or FullSpeed 12Mpbs BIOS EHCI Hand Off This is a workaround for OSes without EHCI hand off support The EHCI ownership cha...

Page 42: ...on USB Mass Storage Reset Delay Number of sends POST wait for the USB mass storage device after start unit com mand Emulation Type If Auto USB devices less than 530MB will be emulated as Floppy and re...

Page 43: ...ures all the device in the system When set to Yes and if you install a Plug and Play operating system the operating system configures the Plug and Play device not required for boot PCI Latency Timer V...

Page 44: ...Channel0 1 3 5 6 7 When set to Available will specified DMA is available to be used by PCI PnP devices When set to Reserved will specified DMA will Reserved for use by legacy ISA devices Reserved Memo...

Page 45: ...ST messages If Enabled an OEM Logo is shown instead of POST messages AddOn ROM Display Mode Set display mode for option ROM Bootup Num Lock Select the Power on state for Numlock PS 2 Mouse Support Sel...

Page 46: ...enu All Secu rity Setup options such as password protection and virus protection are described in this section To access the sub menu for the following items select the item and press Enter Change Sup...

Page 47: ...BIOS settings 3 7 Advanced Chipset Settings Figure 3 23 Advanced Chipset Settings 3 7 1 North Bridge Chipset Configuration Figure 3 24 North Bridge Configuration DRAM Frequency This item allows you t...

Page 48: ...eo function configuration DVMT Mode Select Displays the active system memory mode DVMT FIXED Memory Specify the amount of DVMT FIXED system memory to allocate for video memory Boot Display Device Sele...

Page 49: ...es or disables the USB 2 0 controller Intel 82567V controller Enables or disables the intel LAN controller Boot Rom Enables or disables internal LAN boot Wake Up From S5 Enables or disables LAN1 wake...

Page 50: ...permanent changes to the system configuration 1 Select Exit Discarding Changes from the Exit menu and press Enter The following message appears Discard Changes and Exit Setup Now Ok Cancel 1 Select O...

Page 51: ...elect this option Fail Safe Defaults are designed for maximum system stability but not maximum performance Select Fail Safe Defaults if your computer is experi encing system configuration problems 1 S...

Page 52: ...MIO 2260 User Manual 42...

Page 53: ...Chapter 4 4 S W Introduction Installation...

Page 54: ...chipset folder on the CD ROM 4 3 Value Added Software Services Software API An interface that defines the ways by which an application program may request services from libraries and or operating sys...

Page 55: ...the I2 C protocol has been taken care of by SUSI Instead of asking application programmers to figure out the strict timing requirements in the I2 C protocol the I2 C API in SUSI can be used to control...

Page 56: ...tem Throttling Refers to a series of methods for reducing power consumption in computers by lowering the clock frequency APIs allow the user to lower the clock from 87 5 to 12 5 4 3 3 SUSI Utilities 4...

Page 57: ...s executed the SUSI Library and related files for Windows XP can be found in the target installation directory The files are listed in the following table The following section illustrates the install...

Page 58: ...ATRELEASEDIR GPIO exe NK S SMBUS exe _FLATRELEASEDIR SMBUS exe NK S Place the three files into any files directory Build your new Windows CE operating system 4 3 5 SUSI Sample Programs Sample Programs...

Page 59: ...atform does not support such functions For a complete support list please refer to Appendix A We describe the steps to test all functions of this application GPIO When the application is executed it w...

Page 60: ...radio button Multiple Pins Key in the pin number from 0x01 to 0x0F to choose the multiple pin num bers to write the value of the output pin The pin numbers are ordered bit wise i e bit 0 stands for GP...

Page 61: ...f the watchdog as follows Read a byte Click the radio button Access a byte Key in the slave device address in the Slave address field Key in the register offset in the Register Offset field Click the...

Page 62: ...m the device will be divided from each other by commas and be shown in the Result field Write Multiple bytes Click the radio button Access multiple bytes Key in the slave device address in the Slave a...

Page 63: ...e application is executed it will display watchdog information in the WATCH DOG INFORMATION group box It displays max timeout min timeout and timeout steps in milliseconds For example a 1 255 seconds...

Page 64: ...hardware monitoring data values will be displayed If certain data values are not supported by the platform the correspondent data field will be grayed out with a value of 0 For more details on MIO 22...

Page 65: ...Appendix A A PIN Assignments...

Page 66: ...CN4 SODIMM DDR3 CN5 Audio CN6 Inverter Power Output CN7 GPIO CN8 Front Panel CN9 Mini PCIe CN10 MIOe CN11 CF CN12 SATA CN13 GbE CN14 External USB CN15 12V Power Input CN17 VGA Table A 3 J1 LCD Power A...

Page 67: ...25mm 85204 0400 0 Pin Pin Name 1 GND 2 SMB_DAT 3 SMB_CLK 4 5V Table A 5 CN2 COM1 COM2 Part Number 1653003720 Footprint HD_10x2P_79_RA Description PIN HEADER 10x2P 2 00mm 90D M SMD 21N22050 20J1 Pin P...

Page 68: ...00753 Footprint WHL14HS 125 85204 Description Pin Pin Name 1 5V or 3 3V 2 5V or 3 3V 3 LVDS0_D0 4 LVDS0_D0 5 LVDS0_D1 6 LVDS0_D1 7 LVDS0_D2 8 LVDS0_D2 11 LVDS0_CLK 12 LVDS0_CLK 13 GND 14 GND Table A 7...

Page 69: ...21N22050 Description PIN HEADER 5x2P 2 00mm 90D M SMD 21N22050 Pin Pin Name 1 LOUTR 2 LINR 3 GND 4 GND 5 LOUTL 6 LINL 7 GND 8 GND 9 NC 10 NC Table A 9 CN6 Inverter Power Output Part Number 1655905100...

Page 70: ...Pin Pin Name 1 5V 2 GPIO4 3 GPIO0 4 GPIO5 5 GPIO1 6 GPIO6 7 GPIO2 8 GPIO7 9 GPIO3 10 GND Table A 11 CN8 Front Panel Part Number 1653004883 Footprint HD_3x2_79_RA Description PIN HEADER 2x3P 2 00mm 90...

Page 71: ...ription Pin Pin Name 1 WAKE 2 3 3VSB 3 NC 4 GND 5 NC 6 1 5V 7 NC 8 NC 9 GND 10 NC 11 REFCLK 12 NC 13 REFCLK 14 NC 15 GND 16 NC 17 NC 18 GND 19 NC 20 NC 21 GND 22 PERST 23 PERn0 24 3 3VSB 25 PERp0 26 G...

Page 72: ...r 1654006235 Footprint BB_40x2P_32_1625x285_2HOLD Description Pin Pin Name 1 GND 2 GND 3 PCIE_RX0 4 PCIE_TX0 5 PCIE_RX0 6 PCIE_TX0 7 GND 8 GND 9 PCIE_RX1 10 PCIE_TX1 11 PCIE_RX1 12 PCIE_TX1 13 GND 14...

Page 73: ...38 NC 39 RESET 40 NC 41 SLP_S3 42 CLK33M 43 SLP_S5 44 LPC_AD0 45 NC 46 LPC_AD1 47 NC 48 LPC_AD2 49 NC 50 LPC_AD3 51 NC 52 LPC_DRQ 0 53 NC 54 LPC_SERIRQ 55 NC 56 LPC_FRAME 57 NC 58 GND 59 NC 60 USB0_D...

Page 74: ...MIO 2260 User Manual 64 74 USB2_D USB_SSRX 75 NC 76 GND 77 NC 78 USB_OC 79 12VSB 80 NC 83 GND 84 GND 85 GND 86 GND 87 5VSB 88 5VSB 89 5VSB 90 5VSB Table A 13 CN10 MIO 3 0...

Page 75: ...50P 90D M ANGLE Standard SMT for Compack Pin Pin Name 1 GND 2 D03 3 D04 4 D05 5 D06 6 D07 7 CS0 8 GND 9 GND 10 GND 11 GND 12 GND 13 5V 14 GND 15 GND 16 GND 17 GND 18 A02 19 A01 20 A00 21 D00 22 D01 2...

Page 76: ...P 46 PDIAG 47 D08 48 D09 49 D10 50 GND Table A 15 CN12 SATA Part Number 1654007578 Footprint SATA_7P_WATF 07DBN6SB1U Description Serial ATA 7P 1 27mm 180D M SMD WATF 07DBN6SB1U Pin Pin Name 1 GND 2 TX...

Page 77: ...ootprint RJ45_14P_RT7 194AAM1A Description Pin Pin Name 1 BI_DA GHz 2 BI_DA GHz 3 BI_DB GHz 4 BI_DC GHz 5 BI_DC GHz 6 BI_DB GHz 7 BI_DD GHz 8 BI_DD GHz H3 GND H4 GND Table A 17 CN14 External USB Part...

Page 78: ...X PWR CONN 2x2P 4 2mm 180D M DIP 24W4310 04S Pin Pin Name 1 GND 2 GND 3 12V 4 12V Table A 19 CN17 VGA Part Number 1654000055 Footprint DBVGA VF5MS Description D SUB Conn 15P 90D F DIP 070242FR015S200Z...

Page 79: ...Appendix B B WDT GPIO...

Page 80: ...O_Port 66h mov al 00h out dx al model small 486p stack 256 data SCH3114_IO EQU A00h code org 100h STARTup 47H enable WDT function bit 0 0Ch mov dx SCH3114_IO 47h mov al 0Ch out dx al 65H bit 1 0 Reser...

Page 81: ...output bit 1 Polarity 1 Invert 0 No Invert bit 7 Output Type Select 1 Open Drian 0 Push Pull mov dx SCH3114_IO 23h GPIO 0 mov al 00h program GPIO 0 as output out dx al GIPO 0 GPIO 7 DATA Register SCH...

Page 82: ...MIO 2260 User Manual 72...

Page 83: ...Appendix C C System Assignments...

Page 84: ...7h IDE Controller 2F8 2FF Serial port 2 3F8 3FF Serial port 1 Table C 2 1st MB memory map Addr Range Hex Device F0000h FFFFFh System ROM D0000h EFFFFh Unused reserved for Ethernet ROM C0000h CE7FFh Ex...

Page 85: ...ignments Interrupt Interrupt source IRQ0 Interval timer IRQ1 Keyboard IRQ2 Interrupt from controller 2 cascade IRQ3 COM2 IRQ4 COM1 IRQ5 Reserved IRQ6 Reserved IRQ7 Reserved IRQ8 RTC IRQ9 Reserved IRQ1...

Page 86: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

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