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© Advantech Co., Ltd. 2015

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Summary of Contents for MIC-3396

Page 1: ...User Manual MIC 3396 6U CompactPCI 4th Generation Intel Core i3 i5 i7 Processor Blade with ECC support...

Page 2: ...nty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never need to use our repair service If an Advantech product is def...

Page 3: ...nce in which case the user will be required to correct the interference at his own expense FM This equipment has passed the FM certification According to the National Fire Pro tection Association work...

Page 4: ...nd screws package x 1 Solder side cover Assembled x1 RJ45 to DB9 cable x1 Warranty certificate document x1 Safety Warnings CE FCC class A If any of these items are missing or damaged contact your dist...

Page 5: ...ur any liquid into an opening This may cause fire or electrical shock 13 Never open the equipment For safety reasons the equipment should be opened only by qualified service personnel 14 If one of the...

Page 6: ...on t touch any components on the CPU card or other cards while the PC is on Disconnect power before making any configuration changes The sudden rush of power as you connect a jumper or install a card...

Page 7: ...22 IPMI 7 1 3 Functional Block Diagram 7 Figure 1 1 MIC 3396 functional block diagram 7 1 4 Jumpers and Switches 8 Table 1 4 MIC 3396 jumper descriptions 8 Table 1 5 MIC 3396 switch descriptions 8 1...

Page 8: ...ons 32 Figure 2 12Serial Port 0 1 Configurations 33 Figure 2 13PC Health Status 34 Figure 2 14Console redirection Settings 34 Figure 2 15Out of Band Mgmt Port 35 Figure 2 16Terminal Type 35 Figure 2 1...

Page 9: ...or List 60 3 7 5 Integrity Sensor 60 Table 3 7 Integrity Sensor event data table 60 3 8 OEM IPMI Commands 61 Table 3 8 OEM command list 61 3 8 1 Store Configuration Command 62 Table 3 9 Store Configur...

Page 10: ...77 Table A 6 SATA1 Daughter Board Connector 77 Table A 7 J15 P15 XMC1 Connector 77 Table A 8 VGA1 Connector 77 Table A 9 COM1 RJ45 Connector 78 Table A 10 USB2CN1 USB3CN1 USB3CN2 78 Table A 11 BH1 CMO...

Page 11: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3396 hardware...

Page 12: ...ology An on board 8 GB of 1600 MHz DDR3L memory is provided with a combination of SO DIMM up to max 8 GB of 1600 MHz DDR3L as option It supports a fast Serial ATA interface to an on board hard drive 1...

Page 13: ...mory It also has one 240 pin SO DIMM socket that can accommodate an additional 2GB max to 8GB of memory The following table shows a list of SO DIMM modules that have been tested on the MIC 3396 Table...

Page 14: ...II and SATA III devices The following table shows a list of SATA HDD and SSD that have been tested on the MIC 3396 1 2 9 Serial ports One RJ 45 COM1 port RS 232 interface is provided on the front pane...

Page 15: ...GbE LAN ports one PS 2 two USB2 0 and one display port Rear I O modules are avail able with following different I O options 1 2 14 Mechanical and Environmental Specifications Operating temperature 0...

Page 16: ...GA Usable in CompactPCI system slot Please consult the Pericom PI7C9X130D data book for details 1 2 17 I O Connectivity For MIC 3396 the front panel I O is provided by two RJ 45 Gigabit Ethernet ports...

Page 17: ...devices Serial port COM1 and COM2 are connected to the rear I O module or front panel via multiplexer in the FPGA The PS2 keyboard mouse is routed to the rear I O module 1 2 21 RTC and Battery The RTC...

Page 18: ...S 1 Turn off the system 2 Close jumper CN1 for about 3 seconds 3 Set jumper CN1 as Normal 4 Turn on the system The BIOS is reset to its default setting Table 1 4 MIC 3396 jumper descriptions Number Fu...

Page 19: ...9 MIC 3396 User Manual Chapter 1 Hardware Configuration 1 4 2 VGA Output JP5 This jumper is used to switch VGA output from front panel to rear Table 1 7 JP5 Default 1 2 Front Panel 2 3 Rear IO...

Page 20: ...Manual 10 1 4 3 Switch Settings Note represents the key Table 1 8 SW1 1 PCI Bridge Master Drone Mode Default Master Mode Drone Mode Table 1 9 SW1 2 DRONE_PCISRT _SW Default Drone Mode w o J1 RST Drone...

Page 21: ...ont COM RTM COM1 COM2 ports selection for BMC SIO UART Default Front COM for BMC RTM COM1 for SIO COM1 RTM COM2 for SIO COM2 Front COM for SIO COM1 RTM COM1 for BMC RTM COM2 for SIO COM2 Front COM for...

Page 22: ...MIC 3396 User Manual 12 These switches are only available for the RIO 3316 C1E model Table 1 12 SW5 SW6 for COM2 Default RS232 RS422 RS485...

Page 23: ...O via the J3 J5 connector One USB2 0 and one USB3 0 ports are on the front panel of RIO 3316 C1E the other three are on board connectors The USB interface provides complete plug and play hot attach de...

Page 24: ...nector 1 5 4 SATA Daughter Board Connector SATA1 and Extension Module The MIC 3396 provides one SATA interface via SATA1 connector for either a daugh ter board for SATA HDD It is optional as onboard H...

Page 25: ...r pins We recommend that you perform assembly at an anti static workbench 1 7 1 HDD Installation Steps The MIC 3396 supports 2 5 SATA hard disk drive The SATA HDD daughter board is assembled on the MI...

Page 26: ...the side of HDD and fasten 4pcs M2 5 screw on the on the bracket Figure 1 5 Fasten screws on the SATA HDD bracket 2 Put the SATA HDD with bracket on the post and introduce SATA HDD into SATA connector...

Page 27: ...from Advantech When ordering the battery please contact your local sales office to check availability 1750199011 BATTERY 3V 195 mAH BR2032 1 9 Software Support Windows 7 Windows 8 Windows 2008 Enterpr...

Page 28: ...MIC 3396 User Manual 18...

Page 29: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...

Page 30: ...ich has been specifically adapted for the MIC 3396 With the AMI UEFI BIOS Setup Utility you can modify BIOS settings and control the special features of the MIC 3396 The Setup program uses a number of...

Page 31: ...CMOS battery is removed or password only erased using the clear jumper When the power is turned on press the Del button during the BIOS POST Power On Self Test to access the CMOS SETUP screen 2 3 Ente...

Page 32: ...hat can be configured Grayed out options cannot be configured while options in blue can The right frame displays the key legend Above the key legend is an area reserved for a text message When an opti...

Page 33: ...the left frame of the screen such as CPU Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arrow keys All Advanced BIOS Setu...

Page 34: ...ables or disables VGA Palette Register Snooping PCI Express Settings Set Maximum Payload of PCI Express Device or allow System BIOS to select the value Maximum Payload Set Maximum Payload of PCI Expre...

Page 35: ...Figure 2 5 ACPI Settings System ACPI Parameters Enable Hibernation Enable or Disable System Hibernation OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select the ACPI...

Page 36: ...e 2 6 Trusted Computing Trusted Computing settings Enable Disable Trusted Computing Enables or Disables BIOS support for security device OS will not show Security Device TCG EFI protocol and INT1A int...

Page 37: ...dware enhancements to Intel server and client platforms that provide software based virtualization solu tions Intel VT allows a platform to run multiple operating systems and applications in independe...

Page 38: ...Intel TXT LT support Enables or Disables Intel TXT LT support 2 3 2 5 SATA Configuration Figure 2 8 SATA configuration SATA Controller This items allow users to enable or disable SATA function Disable...

Page 39: ...age devices ACHI mode Set to AHCI mode when you want the SATA hard disk drives to use the AHCI Advanced Host Controller Interface The AHCI allows the onboard storage driver to enable advanced serial A...

Page 40: ...MIC 3396 User Manual 30 Press Ctrl I into Intel Rapid Storage Technology Option ROM Choose Create RAID Volume to build RAID0 or RAID1...

Page 41: ...egacy USB Support Enables support for legacy USB Auto option disables legacy support if no USB devices are connected Disable option will keep USB device available only for EFI applications USB3 0 supp...

Page 42: ...torage Driver Support USB transfer time out The time out value for Control Bulk and Interrupt transfers Device reset time out USB mass storage device start unit command time out Device power up delay...

Page 43: ...C 3396 User Manual Chapter 2 AMI BIOS Setup Serial Port 0 1 Configuration For serial port 0 1 IRQ IO mode resource configuration users can choose IRQ IO and MODE Figure 2 12 Serial Port 0 1 Configurat...

Page 44: ...H W Monitor Configuration System temperature CPU temperature and voltage status can be checked in PC Health Status Figure 2 13 PC Health Status 2 3 2 9 Serial Port Console Redirection Setting Figure 2...

Page 45: ...mergency Management Services EMS Figure 2 15 Out of Band Mgmt Port Out of Band Mgmt Port Select the port for Microsoft Windows Emergency Management Services EMS to allow for remote management of a Win...

Page 46: ...MIC 3396 User Manual 36 2 3 2 10 Network Stack Figure 2 17 Network Stack Network Stack This item allows users to enable or disable UEFI network stack...

Page 47: ...17 LM Figure 2 18 NIC Configuration Settings NIC Configuration Configure Boot Protocol Wake on LAN Link Speed and VLAN Figure 2 19 Link Speed Link Speed Specifies the port speed used for the selected...

Page 48: ...e 2 20 NIC Configuration Settings NIC Configuration Configure Boot Protocol Wake on LAN Link Speed and VLAN Figure 2 21 Link Speed Link Speed Specifies the port speed used for the selected boot protoc...

Page 49: ...left frame of the screen to go to the sub menu for that item Users can display a Chipset Setup option by highlighting it using the Arrow keys All Chipset Setup options are described in this section Th...

Page 50: ...ws users to select the GTT Size Aperture Size This item allows users to select the Aperture Size DVMT Pre Allocated This item allows users to select DVMT 5 0 Pre Allocated fixed Graphics mem ory size...

Page 51: ...users to select the Video Device which will be activated during POST This has no effect if external graphics present Secondary boot display selection will appear based on your selection LCD Panel Typ...

Page 52: ...MIC 3396 User Manual 42 NB PCIe Configuration Figure 2 26 NB PCIe Configuration PEG0 Gen x Select PEG0 speed Enabled PEG This item allows users to enable or disable PEG Memory Configuration...

Page 53: ...anual Chapter 2 AMI BIOS Setup Figure 2 27 Memory Configuration 2 3 3 2 South Bridge Configuration PCI Express Configuration Settings Allow enable or disable PCI Express Root Port Figure 2 28 PCI Expr...

Page 54: ...B Configuration Figure 2 29 USB Configuration Mode of operation of xHCI controller allows user to enable or disable USB port PCH Azalia Configuration Figure 2 30 PCH Azalia Configuration Control Detec...

Page 55: ...T messages If enabled an OEM Logo is shown instead of POST messages Bootup NumLock State By ON the keyboard NumLock state will stay ON after booting By OFF the keyboard NumLock state will stay OFF aft...

Page 56: ...MIC 3396 User Manual 46 Figure 2 32 Hard Drive BBS Priorities CSM16 Parameters Figure 2 33 CSM16 Parameters This item allows users to set display mode for Option ROM...

Page 57: ...Figure 2 34 CSM Parameters This option controls if CSM will be launched 2 3 5 PXE Boot Setting Enter into Boot setting and choose CSM parameters Launch PXE OpROM policy Figure 2 35 Launch PXE OpROM po...

Page 58: ...MIC 3396 User Manual 48 Save and Exit Figure 2 36 Save and Exit Choose boot option priority The Network device BBS Priorities will be shown after enabled PXE OpROM...

Page 59: ...49 MIC 3396 User Manual Chapter 2 AMI BIOS Setup Note 1 Network Device BBS Priorities Note 2 Hard Drive BBS Priorities Figure 2 37 Boot option priority...

Page 60: ...MIC 3396 User Manual 50 Save Changes and Reset again Figure 2 38 Save changes and reset Start PXE Server Figure 2 39 Start page of PXE Server...

Page 61: ...Security Setting Administrator Password Select this option and press ENTER to access the sub menu and then type in the password Set the Administrator password User Password Select this option and pre...

Page 62: ...om the Exit menu and press Enter The following message appears Discard Changes and Exit Setup Now Ok Cancel 2 Select Ok to discard changes and exit Discard Changes Select Discard Changes from the Exit...

Page 63: ...Chapter 3 3 IPMI for the MIC 3396 This chapter describes IPMI con figuration for the MIC 3396...

Page 64: ...l BMC watchdog support as defines in IPMI specification System Event Log SEL HPM 1 for in field updates supporting Bootloader Firmware FPGA BIOS Automatic UART muxing between all serial interfaces for...

Page 65: ...kHz using IPMI compliant messaging I2 C Inter Integrated Circuit IPMB Intelligent Platform Management Bus BMC Intelligent Platform Management Controller IPMI Intelligent Platform Management Interface...

Page 66: ...orted to propagate the BMC s IP address in the system Gratious ARP is supported for dynamic address changes or failover scenarios Other ARP opcodes are not sup ported and will be ignored 3 3 3 2 ICMP...

Page 67: ...ardware reset with the timer use indicating BIOS use If the watchdog timer times out with this configuration it triggers a BIOS chip failover followed by a system reset and restart of the watchdog tim...

Page 68: ...oreover the BMC also registers some logical sensors listed below BMC Watchdog sensor FW Progress sensor Version change sensor Advantech OEM Sensor Integrity Sensor 3 7 1 Sensor List The following tabl...

Page 69: ...MC sensor list Table 3 4 Sensor Threshold description Threshold Description UNR Upper Non Recoverable UCR Upper Critical UNC Upper Non Critical LNC Lower Non Critical LCR Lower Critical LNR Lower Non...

Page 70: ...r its action The table below shows the supported event code structure gen erated by the integrity sensors on the MIC 3396 Table 3 6 Temperature Sensor List Sensor Name Nominal LNR LCR LNC UNC UCR UNR...

Page 71: ...citly identify the OEM vendor that specifies the command func tionality To be more precise the vendor IANA Enterprise Number for the defining body occupies the first three data bytes in a request and...

Page 72: ...controller 05h Failure retries 06h Misc 07h RTC 08h FPGA 09h USB 0Ah Clock Ekeying 0Bh PCIe 0Ch BMC CLI 0Dh IRQ 0Eh Carrier Manager 5 Setting Bios 00h Switch Bios Flash Setting Lan controller Reserve...

Page 73: ...00h not connected 01h Serial over LAN 02h Frontpanel RJ45 03h RTM 1 04h RTM 2 0Bh BMC_MUX FPGA COM2 UART multiplexer 00h not connected 01h Serial over LAN 02h Frontpanel RJ45 03h RTM 1 04h RTM 2 0Bh...

Page 74: ...06h Misc 07h RTC 08h FPGA 09h USB 0Bh PCIe 0Ch BMC CLI 0Dh IRQ 5 5 Port Setting Bios 00h Active Bios Flash Setting Failure Retries 00h Power failure retries 01h UNR Temperature retries Setting FPGA 00...

Page 75: ...led 01h Dynamic Power Budgeting enabled FPGA COM1 UART multiplexer 00h not connected 01h Serial over LAN 02h Frontpanel RJ45 03h Frontpanel miniUSB 04h RTM 1 05h RTM 2 FFh automatic mode FPGA COM2 UAR...

Page 76: ...quest Data 1 3 Advantech IANA ID 392800h Response Data 1 Completion Code 2 4 Advantech IANA ID 392800h 5 POST code Table 3 12 Read MAC Address Command byte data field Request Data 1 3 Advantech IANA I...

Page 77: ...loader update The bootloader HPM 1 upgrade is written to the LPC1768 flash directly Means there is no recovery existing for the bootloader image It is not recommended to upgrade the bootloader in the...

Page 78: ...oard Information Table 3 15 Board Info Area Field description Board information Format version 0x01 Board area length calculated Language code 0x19 English Manufacturer date time based on manufacturin...

Page 79: ...ength 0xC8 Product name MIC 3396 Product part model number type length 0xC8 Product part model number MIC 3396 Product version type length 0xC5 Product version Hardware Version Product serial number t...

Page 80: ...MIC 3396 User Manual 70...

Page 81: ...Appendix A A Pin Assignments This appendix describes pin assignments...

Page 82: ...3 3V IPMB_SCL IPMB_SDA GND PERR GND 16 GND DEVSEL PCIXCAP V I O STOP LOCK GND 15 GND 3 3V FRAME IRDY BD_SEL TRDY GND 12 14 KEY AREA 11 GND AD 18 AD 17 AD 16 GND C BE 2 GND 10 GND AD 21 GND 3 3V AD 20...

Page 83: ...AD 35 AD 34 AD 33 GND AD 32 GND 13 GND AD 38 GND V I O AD 37 AD 36 GND 12 GND AD 42 AD 41 AD 40 GND AD 39 GND 11 GND AD 45 GND V I O AD 44 AD 43 GND 10 GND AD 49 AD 48 AD 47 GND AD 46 GND 9 GND AD 52...

Page 84: ...X11 PCIE_RX11 GND 7 GND PCIE_TX14 PCIE_TX14 TAP_TCK PCIE_RX14 PCIE_RX14 GND 8 GND PCIE_CLK USB3_6TX TAP_TRST USB3_2TX USB3_2RX GND 9 GND PCIE_CLK USB3_6TX TAP_TDI USB3_2TX USB3_2RX GND 10 GND PCIE_TX1...

Page 85: ...NC NC GND DDI2_PAIR2 GND GND 9 GND NC NC GND DDI2_PAIR2 DDI2_DDC_CLK GND 10 GND NC NC GND DDI2_PAIR3 DDI2_DDC_DAT GND 11 GND NC NC GND DDI2_PAIR3 DDI2_HPD GND 12 14 15 GND NC NC GND AUDIO_GND MIC_L GN...

Page 86: ...WR USB12_PWR VGA_DDC_DA T GND 11 GND DDI1_PAIR1 GND KBDAT USBD12 VGA_DDC_CL K GND 12 GND DDI1_PAIR2 GND KBCLK USBD12 VGA_PWR GND 13 GND DDI1_PAIR2 GND DDI1_HPD GND VGA_VSYNC GND 14 GND DDI1_PAIR3 GND...

Page 87: ...ETX_P5 PETX_N5 VPWR 5V 6 GND GND NC JTMS GND GND 12V 7 PETX_P6 PETX_N6 3 3V PETX_P7 PETX_N7 VPWR 5V 8 GND GND NC JTDI GND GND 12V 9 NC NC NC NC NC VPWR 5V 10 GND GND NC JTDO GND GND GA0 11 PERX_P0 PER...

Page 88: ...USB3CN2 USB2CN1 USB3CN1 USB3CN2 1 5V fused 1 5V fused 1 5V fused 2 USBD0 2 USBD1 2 USBD1 3 USBD0 3 USBD1 3 USBD1 4 GND 4 GND 4 GND 5 SSRX 5 SSRX 6 SSRX 6 SSRX 7 GND 7 GND 8 SSTX 8 SSTX 9 SSTX 9 SSTX T...

Page 89: ...and Hot swap LEDs Name Description M D Green Indicates Master or Drone mode status PWR Green Indicates power status HDD Yellow Indicates BMC status heart beat to indicate BMC active Hot Swap Blue Indi...

Page 90: ...MIC 3396 User Manual 80...

Page 91: ...Appendix B B Programming the Watchdog Timer This appendix describes how to program the watchdog timer...

Page 92: ...by rewriting the I O port 443 and 443 hex while simultaneously setting it When you want to disable the watchdog timer your program should read I O port 444 hex The following example shows how you migh...

Page 93: ...Appendix C C FPGA This appendix describes FPGA configuration...

Page 94: ...ce Standard IPMI payload interface from x86 to BMC Watchdog Debug Message Boot time POST message C 3 FPGA I O Registers The Advantech MIC 3396 FPGA communicates with main I O spaces The LPC unit is us...

Page 95: ...Appendix D D Glossary...

Page 96: ...t Output IC Integrated Circuit IMCH Integrated Memory Controller Hub LED Light Emitting Diode LPC Low Pin Count LV Low Voltage MAC Medium Access Control OS Operating System PCB Printed Wiring Board PC...

Page 97: ...87 MIC 3396 User Manual Appendix D Glossary...

Page 98: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

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