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MIC-3396 User Manual
Chapter 3
IPMI for
the
MIC-3396
3.3
IPMI Interfaces
The MIC-3396 provides three main IPMI messaging interfaces to connect to the
BMC. There are the IPMB-0 for main messaging interface between CPCI boards, the
LAN side band interface (NCSI) and the on-board payload interface to x86 (KCS).
Figure 3.1 Management part block diagram
3.3.1
IPMB-0
IPMB-0 is the I
2
C-based PICMG 2.9 R1.0 defined main messaging interface between
CPCI boards. It consists of one I
2
C bus clocked at a frequency of 100 kHz, using
IPMI compliant messaging.
I
2
C
Inter Integrated Circuit
IPMB
Intelligent Platform Management Bus
BMC
Intelligent Platform Management Controller
IPMI
Intelligent Platform Management Interface
KCS
Keyboard Controller Style
LPC
Low Pin Count (Bus)
NCSI
Network Controller Sideband Interface
NIC
Network Interface Controller
PLD
Programmable Logic Device
RMCP
Remote Management Communication Protocol
RS232
Recommended Standard 232
SAS
Serial Attached Storage
SATA
Serial Advanced Technology Attachment
SDR
Sensor Data Record
Sensor Data Repository
SEL
System Event Log
SPI
Serial Peripheral Interface
UART
Universal Asynchronus Receiver Transmitter
USB
Universal Serial Bus
XMC
XMC mezzanine card (Vita 42.0)
Summary of Contents for MIC-3396
Page 11: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3396 hardware...
Page 28: ...MIC 3396 User Manual 18...
Page 29: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...
Page 63: ...Chapter 3 3 IPMI for the MIC 3396 This chapter describes IPMI con figuration for the MIC 3396...
Page 80: ...MIC 3396 User Manual 70...
Page 81: ...Appendix A A Pin Assignments This appendix describes pin assignments...
Page 90: ...MIC 3396 User Manual 80...
Page 93: ...Appendix C C FPGA This appendix describes FPGA configuration...
Page 95: ...Appendix D D Glossary...