MIC-3056 User Manual -- Page 15
CompactPCI™ specification version 2.0 R3.0 for further information on slot
assignments). The physical numbers are printed on the backplane, enclosed in
circles or triangles, below each slot. Slot 1, marked by a triangle, is the system slot
and can only be used by a CPU board. The other slots are peripheral slot and can be
used by three peripheral cards. The logical number of each slot is defined according
to the IDSEL signal and the associated address used to select the slot. Table 3-1
shows the system slot and peripheral slots relationships on the backplane. Physical
slot 1 (system slot) has a logical number of 1, and physical slot 2, 3, 4 has a logical
number of 2, 3, 4. The connectors in logical slot 1 are designated as 1-P1, 1-P2 and
1-P3 from the bottom up.
Nomenclature for connectors in the other slot is similar, such as 2-P1 and 2-P2.
Connector P1 on the system slot (slot 1) is a keyed connector providing 32-bit
CompactPCI™ bus between the system slot and the peripheral slot. Connector P2 on
the system slot (slot 1) is an un-keyed connector providing 64-bit CompactPCI™
bus between the system slot and the peripheral slots. Connector P3 on the system
slot (slot 1) is open for user definition.
Appendix A gives the pin assignment for all the connectors on the backplane.
System Slot (Logical Slot 1)
Peripheral Slot (Logical Slot 2)
CLK0 P1:D6 CLK P1:D6
AD31 P1:E6 IDSEL P1:B9
REQ0# P1:A6 REQ# P1:A6
GNT0# P1:E5 GNT# P1:E5
System Slot (Logical Slot 1)
Peripheral Slot (Logical Slot 3)
CLK1 P2:A1 CLK P1:D6
AD30 P1:A7 IDSEL P1:B9
REQ1# P2:C1 REQ# P1:A6
GNT1# P2:D1 GNT# P1:E5
System Slot (Logical Slot 1)
Peripheral Slot (Logical Slot 4)
CLK2 P2:A2 CLK P1:D6
AD29 P1:B7 IDSEL P1:B9
REQ2# P2:E2 REQ# P1:A6
GNT2# P2:D2 GNT# P1:E5
Table 3-1: System to peripheral slot signal assignment
