Advantech IPPC-6152F Series, User Manual

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IPPC-6152F User Manual 42
5.2.3 Advanced Chipset Features Setup
The Advanced Chipset Features Setup option is used to change the values
of the chipset registers. These registers control most of the system options
in the computer. Choose the "Advanced Chipset Features" from the main
menu and the following screen will appear.
DRAM Timing Configuration
This field lets you select system memory timing data. Manual and BY
SPD are two options. Default is "BY SPD"
CAS Latency Time
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on DRAM timing. The settings are: 3,4,5 and Auto.
DRAM RAS# to CAS# Delay
This field is used to insert a timing delay between the CAS and RAS
strobe signals, used when DRAM is written to, read from, or refreshed.
Fast gives faster performance; and Slow gives more stable performance.
This field applies only when synchronous DRAM have been installed in
the system. The settings are: 2,3,4,5 and auto.