Advantech IDK-1115WP-45FHA1, User Manual, Page: 23 / 51

17 IDK-1115WP User Manual
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2.9 Pin Description
Note! Please avoid floating state of interface signal at invalid period.
Note!
When the interface signal is invalid, be sure to pull down the power sup -
ply of LCD VCC to 0 V.
Note! The Backlight converter power must be turned on after the power supply
for the logic and the interface signal is valid. The Backlight converter
power must be turned off before the power supply for the logic and the
interface signal is invalid.
Table 2.7: Pin Description
Pin Name Description
1 NC Not connection, this pin should be open
2 NC Not connection, this pin should be open
3 NC Not connection, this pin should be open
4 GND Ground
5 RX0- Negative LVDS differential data input. Channel 0
6 RX0+ Positive LVDS differential data input. Channel 0
7 GND Ground
8 RX1- Negative LVDS differential data input. Channel 1
9 RX1+ Positive LVDS differential data input. Channel 1
10 GND Ground
11 RX2- Negative LVDS differential data input. Channel 2
12 RX2+ Positive LVDS differential data input. Channel 2
13 GND Ground
14 RXCLK- Negative LVDS differential clock input
15 RXCLK+ Positive LVDS differential clock input
16 GND Ground
17 RX3- Negative LVDS differential data input. Channel 3
18 RX3+ Positive LVDS differential data input. Channel 3
19 GND Ground
20 NC Not connection, this pin should be open
21 NC Not connection, this pin should be open
22 NC Not connection, this pin should be open
23 GND Ground
24 GND Ground
25 GND Ground
26 Vcc +5V power supply
27 Vcc +5V power supply