Advantech EKI-1221, User Manual, Page: 13 / 67

5 EKI-122X Series User Manual
The basic system architecture is as below:
Figure 2.1 Modbus System Architecture 1
Figure 2.2 Modbus System Architecture 2
2.1.2 Modbus RTU
The Modbus/RTU protocol defines how a “master” device polls one or more “slave”
devices to read and write data in real-time over RS-232, RS-422, or RS-485 serial
data communication.
When using RTU mode, each 8-bit byte in a message contains two 4-bit hexadecimal
characters. The main advantage of this mode is that its greater character density
allows better data throughput than ASCII mode for the same baud rate. Neverthe-
less, each message must be transmitted in continuous stream.
2.1.3 Modbus ASCII
When using ASCII mode, each 8-bit byte in a message is sent as two ACSII charac-
ters. The primary advantage of this ASCII mode is that it allows time intervals of up to
one second to occur between characters without causing an error.
PWR2 P-F ail DC12 -48 V
DC1 2-4 8V
PW
R1
V2- V 2+ V1- V 1+ 1A @24 V
1
2
1
2
P1 P2 Sta tus
Defau lt
EKI - 1222
Tx Rx
Tx Rx
S er
ial P
or ts PW R2 P-Fail DC1 2-48V
DC1 2-48V PWR1
V2- V 2+ V1- V1 +
1A @24V
1
2
1
Defaul
t
LA
N
S
e ria l P
o rts
S e ria
l P o rts
P1 P2 Sta
tus
EKI - 12 21
Tx Rx
Ethernet 1
Ethernet 2
1
2
RS232
(Modbus /
Ascll)
(M
odbus / R
TU)
(Modbus /
Ascll) RS485
(Modbus / R
TU) RS485
R
/ Asc
RT
U
R
(Modbu
us /
(M
o
(
dbu
us /
PC
Host (PC)
EKI 1222
EKI 1221
PLC
Modbus / TCP
Master Device
o
RT
U)
485 RS485
U)
RS4
A
(Mo ((Mo (M
Asc Ascll)
(Modbus /
A
/ A
A
PWR2 P-F ail DC1 2-48V
DC1 2-48V PW R1
V2- V 2+ V1- V1+ 1A@
24V
1
2
1 3
2 4
P1 P2 Status
Default
LA N
Seria l Ports EKI
- 12 24
Tx Rx
Tx Rx
Tx Rx
Tx Rx
Ethernet 1
RS232/422/485
Ethernet 2
Mode RTU ASCII
Coding System 8-bit binary.
Two hexadecimal character co
tained in each ASCII character of
the message Hexadecimal.
One hexadecimal character co
tained in each ASCII character of
the message
Bits per Byte 1 start bit,
8 data bits,
1 bit for even/odd parity; no bit for
parity
1 stop bit if parity is used;
2 bits if no parity 1 start bit ,
7 data bits,
1 bit for even/odd parity; no bit for
parity
1 stop bit if parity is used;
2 bits if no parity
Error Check CRC LRC