ECU-P1706 Startup Manual 3
Connections
Instant AI & Buffered AI Channel
Figure 1 - Differential Input Channel Connection
Buffered AI Trigger & CLK Source
The ECU-P1706 has a double-clock system, with a
SCAN clock and CONV clock, to generate efficient
A/D conversion clocks at specific times. A/D
conversion clocks come from internal clock sources
or external signals on a connector. The CLK has
several sources.
Internal A/D clock derived from 32-bit divider
External A/D clock from terminal board
With ECU-P1706, user can define the type of trigger
source as rising-edge or falling-edge. The Trigger has
several sources.
External digital (TTL) trigger from terminal
board
Soft trigger
Threshold trigger
Figure 2 - Trigger Source and CLK Source
Connection
Counter - Event Counter
Figure 3 - Event Counter Connection
Frequency Measurement
Figure 4 -Frequency Measurement Connection
Time Pulse
Figure 5 -Pulse Connection
One-shot Connection
When the Gate pin receives a trigger, Counter begin to
count using internal clock or external clock. The Out
pin output a pulse or Toggled signal after the counter
count the number of delay count that can be set by user.
Figure 6 -One shot Connection
PwMeter Connection (PWM_IN)
Figure 7 -PwMeter Connection (PWM_IN)
PwModulator (PWM_OUT)
Figure 8 -PwModulator Connection (PWM_OUT)
