Advantech AIMB-580, User Manual, Page: 23 / 110

11 AIMB-580 User Manual
Chapter 1
G
eneral
Information
1.10 Rules for Populating Memory Slots
In all modes, the frequency of system memory is the lowest frequency of all memory
modules placed in the system, as determined through the SPD registers on the mem-
ory modules. The system memory controller supports one or two DIMM connectors
per channel. For dual-channel modes both channels must have at least one DIMM
connector populated and for single-channel mode only a single-channel may have
one or both DIMM connectors populated.
Note! DIMMA1 must always be populated within any memory configuration.
DIMMA1 is the furthest DIMM within a channel and is identified by the
CS#[1:0], ODT[1:0], and CKE[1:0] signals.
1.11 Memory Installation Procedures
To install SDRAM, first make sure the two handles of the socket are in the “open”
position. i.e. The handles lean outward. Slowly slide the module along the plastic
guides on both ends of the socket. Then press the module right down into the socket,
until you hear a click. This is when the two handles have automatically locked the
memory module into the correct position of the socket. To remove the memory mod-
ule, just push both handles outward, and the memory module will be ejected by the
mechanism in the socket.
1.12 Cache Memory
The AIMB-580 supports a CPU with one of the following built-in full speed L2 caches:
„
8 MB for Intel Core i7 CPU
„
8 MB for Intel Core i5-700 CPU
„
4 MB for Intel Core i5-600 CPU
„
4 MB for Intel Core i3 CPU
„
3 MB for Intel Pentium CPU
The built-in second-level cache in the processor yields much higher performance
than conventional external cache memories.
1.13 Processor Installation
The AIMB-580 is designed for LGA1156, Intel Core i7/Core i5/Core i3/Pentium
processor.