Advantech AIIS-1240, User Manual

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27 AIIS-1240 User Manual
Chapter 3
A
MI BIOS
Setup

PCI 64-bit Resources Handing
Above 4G Decoding
Enable/Disable 64-bit capable devices to be decoded in above 4G address
space (only if system supports 64-bit PCI decoding).

PCI Common Settings
PCI Latency Timer
Value to be programed into PCI Latency Timer Register.
VGA Palette Snoop
Enables/Disables VGA palette registers snooping.
Figure 3.5 PCI Express Settings

Link Training Retry
Defines number of retry attempts the software will take to retrain the link if previ-
ous training attempts were unsuccessful.

Link Training Timeout
Defines number of micro-seconds the software will wait before polling "Link
Training" bit in the link status register. Values range from 10 to 1000 uS.