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Registers Format
3
Registers Format
The detailed description of the register format and structure of the ACL-
8113A are specified in this chapter. This information is quite useful for the
programmers who wish to handle the ACL-8113A card by low-level
programming.
In addition, the low level programming syntax is introduced. This information
can help the beginners to operate the ACL-8113A in the shortest learning
time.
3.1 I/O Port Address Map
The ACL-8113A requires 16 consecutive addresses in the PC I/O address
space. The following table shows the location of each register and driver
relative to the base address, and its description.
Location
READ
WRITE
Base + 0
Not Used
Not Used
Base + 1
Not Used
Not Used
Base + 2
Not Used
Not Used
Base + 3
Not Used
Not Used
Base + 4
A/D low byte
Not Used
Base + 5
A/D high byte
Not Used
Base + 6
Not Used
Not Used
Base + 7
Not Used
Not Used
Base + 8
Not Used
Not Used
Base + 9
Not Used
Gain Control
Base + 10
Not Used
AD Channel Control
Base + 11
Not Used
Not Used
Base + 12
Not Used
Software A/D trigger
Base + 13
Not Used
Not Used
Base + 14
Not Used
Not Used
Base + 15
Not Used
Not Used
Summary of Contents for NuDAQ ACL-8113A
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