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Express-SL2

Pinouts and Signal Descriptions

23

3.4.2. PCI

Signal

Pin # Description

I/O

PU/PD

Comment

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C24
D22
C25
D23
C26
D24
C27
D25
C28
D27
C29
D28
C30
D29
C32
D30
D37
C39
D38
C40
D39
C42
D40
C43
D42
C45
D43
C46
D44
C47
D45
C48

PCI bus multiplexed address and data lines

I/O 3.3V

PCI_C/BE0#
PCI_C/BE1#
PCI_C/BE2#
PCI_C/BE3#

D26
C33
C38
C44

PCI bus byte enable lines, active low

I/O 3.3V

PCI_DEVSEL# C36

PCI bus Device Select, active low.

I/O 3.3V PU 5K1

3.3V

PCI_FRAME#

D36

PCI bus Frame control line, active low.

I/O 3.3V PU 5K1

3.3V

PCI_IRDY#

C37

PCI bus Initiator Ready control line, active low.

I/O 3.3V PU 5K1

3.3V

PCI_TRDY#

D35

PCI bus Target Ready control line, active low.

I/O 3.3V PU 5K1

3.3V

PCI_STOP# D34

PCI bus STOP control line, active low, driven by cycle
initiator.

I/O 3.3V PU 5K1

3.3V

PCI_PAR

D32

PCI bus parity

I/O 3.3V

PCI_PERR# C34

Parity Error:
An external PCI device drives PERR# when it
receives data that has a parity error.

I/O 3.3V PU 5K1

3.3V

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

C22
C19
C17
D20

PCI bus master request input lines, active low.

I 3.3V

PU 5K1
3.3V

PCI_GNT0# C20

PCI bus master grant output lines, active low.

O 3.3V

PU 5K1

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Summary of Contents for Express-SL2

Page 1: ...DGE COMPUTING Express SL2 User s Manual COM Express Basic Size Type 2 Module with 64 bit 6th Gen Intel Core Xeon E3 and Celeron processors Manual Rev 1 0 Revision Date September 2 2019 Part Number 50 1J100 1000 ...

Page 2: ...h damages Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union s Restriction of Hazardous Substances RoHS directive and Waste Electrical and Electronic Equipment WEEE directive Environmental protection is a top priority for ADLINK We have enforced measures to ensure that our products ma...

Page 3: ... Operating Systems 6 2 16 Functional Diagram 7 2 17 Mechanical Drawing 8 3 Pinouts and Signal Descriptions 9 3 1 AB CD Pin Definitions 9 3 2 Signal Description Terminology 12 3 3 AB Signal Descriptions 13 3 4 CD Signal Descriptions 22 4 Connector Pinouts on Module 27 4 1 Connector Switch and LED Locations 27 4 2 40 pin Debug Connector 29 4 3 Status LEDs 30 4 4 Fan Connector 31 4 5 BIOS Setup Defau...

Page 4: ...tructure 47 7 2 Main 48 7 3 Advanced 52 7 4 Boot 69 7 5 Security 70 7 6 Save Exit 71 8 BIOS Checkpoints Beep Codes 73 8 1 Status Code Ranges 74 8 2 Standard Status Codes 74 8 3 OEM Reserved Checkpoint Ranges 81 9 Mechanical Information 83 9 1 Board to Board Connectors 83 9 2 Thermal Solution 84 9 3 Mounting Methods 87 9 4 Standoff Types 88 Safety Instructions 89 Getting Service 90 ...

Page 5: ...Diagram 7 Figure 2 Express SL2 Mechanical Drawing 8 Figure 3 Express SL2 Connector Switch and LED Locations 27 Figure 4 Express SL2 and the DB40 Debug Module 28 Figure 5 cExpress Switch Locations 33 Figure 6 COM Express Mounting Methods 87 Figure 7 COM Express Standoff Types 88 ...

Page 6: ...Table 3 Express SL2 LED Descriptions 30 Table 4 Fan Connector Pin Definition 31 Table 5 PCI Express Configuration Switch Settings 33 Table 6 BIOS Select and Mode Configuration Switch Settings 34 Table 7 SEMA Onboard Voltage Monitor 38 Table 8 SEMA BMC Status 38 Table 9 SEMA Exception Codes 39 Table 10 SEMA BMC Flags 39 ...

Page 7: ...d Direct Media Interface provide high speed connectivity to the Mobile Intel QM170 HM170 CM236 Chipset Integrated Intel Generation 9 Graphics includes features such as OpenGL 4 4 4 3 4 2 DirectX 11 Intel Clear Video HD Technology Advanced Scheduler 2 0 1 0 XPDM support and DirectX Video Acceleration DXVA support for full H 265 HEVC MPEG2 hardware decode Graphics outputs include VGA and LVDS The Ex...

Page 8: ...2 Introduction This page intentionally left blank ...

Page 9: ...Intel AVX2 Intel AES NI PCLMULQDQ Instruction Intel Device Protection Technology with Intel Secure Key Intel TSXNI Note Availability of features may vary between processor SKUs Cache 8MB for Xeon Core i7 6MB for Core i5 3MB for Core i3 and 2MB for Celeron Memory Dual channel non ECC ECC 1866 2133 MHz DDR4 memory up to 32GB in dual stacked SODIMM socket Chipset Mobile Intel QM170 HM170 and CM236 Ch...

Page 10: ... Interface support through DP to VGA chip LVDS Interface single dual channel 18 24 bit LVDS through eDP to LVDS chip supports DE mode and Hsync Vsync mode max resolution 1920x1200 60Hz in dual mode pixel clock frequency up to 112MHz VESA and JEIDA panel data formats supported Digital Display Interface support in place of PEG lanes by build option max two DDI channels 2 4 Audio Integrated Intel HD ...

Page 11: ...le connector to be used with DB 40 debug module Supports BIOS POST code LED BMC access SPI BIOS flashing power testpoints debug LEDs z 60 pin XDP header for ICE debug of CPU chipset 2 10 Power Specifications Power Modes AT and ATX mode AT mode startup controlled by SEMA Board Controller Standard Voltage Input ATX 12V 5 5Vsb 5 or AT 12V 5 Wide Voltage Input ATX 8 5 20V 5Vsb 5 or AT 8 5 20V Power Ma...

Page 12: ...90 RH non condensing Storage 5 95 RH and operating with conformal coating Shock and Vibration IEC 60068 2 64 and IEC 60068 2 27 MIL STD 202F Method 213B Table 213 I Condition A and Method 214A Table 214 I Condition D HALT Thermal Stress Vibration Stress Thermal Shock and Combined Test 2 14 Specification Compliance z PICMG COM 0 Rev 2 1 Type 2 Basic size 125 x 95 mm 2 15 Operating Systems Standard ...

Page 13: ...PI DMI HD Audio 3x SATA 6Gb s port 0 1 2 8x USB 2 0 SPI 1 BIOS DDC I2C SODIMM 2 1866 2133 MHz DDR4 SPI_CS DDI 1 DP HDMI DVI DDI 2 DP HDMI DVI single dual 18 24 bit LVDS 6x PCIe x1 Gen3 port 0 5 New SEMA BMC eDP LVDS GbE i219 LM V PCIe x1 SMBus SMBus SODIMM 1 1866 2133 MHz DDR4 eDP x2 eDP x4 VGA DP to VGA Switch PEG or DDI PEG or DDI 1 DDI 2 PCIe to PCI PCI PCIe SATA to PATA PATA SATA 4GPI 4GPO 1x ...

Page 14: ...e dimensions shown in millimeters Tolerances should be 0 25mm 0 010 unless otherwise noted The tolerances of the module connector locating peg holes dimensions 16 50 6 00 and 16 50 18 00 should be 0 10mm 0 004 Figure 2 Express SL2 Mechanical Drawing ...

Page 15: ...TN C12 IDE_D14 D12 IDE_IRQ A13 GBE0_MDI0 B13 SMB_CK C13 IDE_IORDY D13 IDE_A0 A14 GBE0_CTREF B14 SMB_DAT C14 IDE_IOR D14 IDE_A1 A15 SUS_S3 B15 SMB_ALERT C15 PCI_PME D15 IDE_A2 A16 SATA0_TX B16 SATA1_TX C16 PCI_GNT2 D16 IDE_CS1 A17 SATA0_TX B17 SATA1_TX C17 PCI_REQ2 D17 IDE_CS3 A18 SUS_S4 B18 SUS_STAT C18 PCI_GNT1 D18 IDE_RESET A19 SATA0_RX B19 SATA1_RX C19 PCI_REQ1 D19 PCI_GNT3 A20 SATA0_RX B20 SAT...

Page 16: ...NE_RV A55 PCIE_TX4 B55 PCIE_RX4 C55 PEG_RX1 D55 PEG_TX1 A56 PCIE_TX4 B56 PCIE_RX4 C56 PEG_RX1 D56 PEG_TX1 A57 GND B57 GPO2 C57 TYPE1 D57 TYPE2 A58 PCIE_TX3 B58 PCIE_RX3 C58 PEG_RX2 D58 PEG_TX2 A59 PCIE_TX3 B59 PCIE_RX3 C59 PEG_RX2 D59 PEG_TX2 A60 GND FIXED B60 GND FIXED C60 GND FIXED D60 GND FIXED A61 PCIE_TX2 B61 PCIE_RX2 C61 PEG_RX3 D61 PEG_TX3 A62 PCIE_TX2 B62 PCIE_RX2 C62 PEG_RX3 D62 PEG_TX3 A...

Page 17: ...3 GPO0 B93 VGA_HSYNC C93 GND D93 GND A94 SPI_CLK B94 VGA_VSYNC C94 PEG_RX13 D94 PEG_TX13 A95 SPI_MOSI B95 VGA_I2C_CK C95 PEG_RX13 D95 PEG_TX13 A96 GND B96 VGA_I2C_DAT C96 GND D96 GND A97 TYPE10 B97 SPI_CS C97 RSVD D97 PEG_ENABLE A98 RSVD B98 RSVD C98 PEG_RX14 D98 PEG_TX14 A99 RSVD B99 RSVD C99 PEG_RX14 D99 PEG_TX14 A100 GND FIXED B100 GND FIXED C100 GND FIXED D100 GND FIXED A101 RSVD B101 RSVD C10...

Page 18: ... O 5V Output 5V signal level I O 3 3V Bi directional signal 3 3V tolerant I O 5V Bi directional signal 5V tolerant I O 3 3Vsb Input 3 3V tolerant active in standby state P Power Input Output REF Reference voltage output that may be sourced from a module power plane PDS Pull down strap This is an output pin on the module that is either tied to GND or not connected The signal is used to indicate the...

Page 19: ...g VGA Signal Pin Description I O PU PD Comment VGA_RED B89 Red for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Shall also be terminated on the carrier with 150Ω resistor to ground close to VGA connector VGA_GRN B91 Green for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R Shall also be terminated on the carrier wit...

Page 20: ...2 3 3V LVDS_I2C_DAT A84 DDC lines used for flat panel detection and control I O OD 3 3V PU 2k2 3 3V 3 3 4 Gigabit Ethernet Gigabit Ethernet Pin Description I O PU PD Comment GBE0_MDI0 GBE0_MDI0 GBE0_MDI1 GBE0_MDI1 GBE0_MDI2 GBE0_MDI2 GBE0_MDI3 GBE0_MDI3 A13 A12 A10 A9 A7 A6 A3 A2 Gigabit Ethernet Controller 0 Media Dependent Interface Differential Pairs 0 1 2 3 The MDI can operate in 1000 100 and ...

Page 21: ...led on Module SATA0_RX SATA0_RX A19 A20 Serial ATA channel 0 Receive Input differential pair I SATA AC coupled on Module SATA1_TX SATA1_TX B16 B17 Serial ATA channel 1 Transmit Output differential pair O SATA AC coupled on Module SATA1_RX SATA1_RX B19 B20 Serial ATA channel 1 Receive Input differential pair I SATA AC coupled on Module SATA2_TX SATA2_TX A22 A23 Serial ATA channel 2 Transmit Output ...

Page 22: ... PCI Express channel 3 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX3 PCIE_RX3 B58 B59 PCI Express channel 3 Receive Input differential pair I PCIE AC coupled off Module PCIE_TX4 PCIE_TX4 A55 A56 PCI Express channel 4 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX4 PCIE_RX4 B55 B56 PCI Express channel 4 Receive Input differential pair I PCIE AC couple...

Page 23: ...B 1 1 2 0 compliant USB6 USB6 A37 A36 USB differential data pairs for Port 5 I O 3 3VSB USB 1 1 2 0 compliant USB7 USB7 B37 B37 USB differential data pairs for Port 6 I O 3 3VSB USB 1 1 2 0 compliant USB_0_1_OC B44 USB over current sense USB ports 0 and 1 A pull up for this line shall be present on the module An open drain driver from a USB current monitor on the carrier board may drive this line ...

Page 24: ...use less than 100mA of SPI_POWER SPI_POWER shall only be used to power SPI devices on the Carrier O P 3 3VSB BIOS_DIS0 A34 Selection strap to determine the BIOS boot device I PU 10K 3 3VSB Carrier shall pull to GND or leave not connected BIOS_DIS1 B88 Selection strap to determine the BIOS boot device I PU 10K 3 3VSB Carrier shall pull to GND or leave not connected 3 3 11 Miscellaneous Signal Pin D...

Page 25: ... 3 3VSB PU 2k2 3 3VSB Source SEMA BMC I2C_DAT B34 General purpose I C port data I O line I O OD 3 3VSB PU 2k2 3 3VSB Source SEMA BMC 3 3 14 General Purpose I O GPIO Signal Pin Description I O PU PD Comment GPO 0 A93 General purpose output pins O 3 3V PU 10K 3 3V After hardware RESET output low GPO 1 B54 General purpose output pins O 3 3V PU 10K 3 3V After hardware RESET output low GPO 2 B57 Genera...

Page 26: ...d This signal can be used to hold off Module startup to allow carrier based FPGAs or other configurable devices time to be programmed I 3 3V PU 10k 3 3VSB Should have weak pull up SUS_STAT B18 Indicates imminent suspend operation used to notify LPC devices O 3 3VSB SUS_S3 A15 Indicates system is in Suspend to RAM state Active low output An inverted copy of SUS_S3 on the carrier board also known as...

Page 27: ...al See section 7 Electrical Specifications for allowable input range If VCC5_SBY is used all available VCC_5V_SBY pins on the connector s shall be used Only used for standby and suspend functions May be left unconnected if these functions are not used in the system design P 5Vsb 5 VCC_RTC A47 Real time clock circuit power input Nominally 3 0V P GND A1 A11 A21 A31 A41 A51 A57 A60 A66 A70 A80 A90 A1...

Page 28: ... device O 3 3V IDE_REQ D8 IDE Device DMA Request It is asserted by the IDE device to request a data transfer I 3 3V PD 5K6 IDE_ACK D10 IDE Device DMA Acknowledge O 3 3V IDE_CS1 D16 IDE Device Chip Select for 1F0h to 1FFh range O 3 3V IDE_CS3 D17 IDE Device Chip Select for 3F0h to 3FFh range O 3 3V IDE_IORDY C13 IDE device I O ready input Pulled low by the IDE device to extend the cycle I 3 3V PU 4...

Page 29: ...C38 C44 PCI bus byte enable lines active low I O 3 3V PCI_DEVSEL C36 PCI bus Device Select active low I O 3 3V PU 5K1 3 3V PCI_FRAME D36 PCI bus Frame control line active low I O 3 3V PU 5K1 3 3V PCI_IRDY C37 PCI bus Initiator Ready control line active low I O 3 3V PU 5K1 3 3V PCI_TRDY D35 PCI bus Target Ready control line active low I O 3 3V PU 5K1 3 3V PCI_STOP D34 PCI bus STOP control line acti...

Page 30: ...NOT capable of 66 MHz operation If the Module is not capable of supporting 66 MHz PCI operation this input may be a no connect on the Module If the Module is capable of supporting 66 MHz PCI operation and if this input is held low by the Carrier Board the Module PCI interface shall operate at 33 MHz I 3 3V PD 100 ohm 3 4 3 Module Type Definition Signal Pin Description I O Comment TYPE0 TYPE1 TYPE2...

Page 31: ...available VCC_12V pins on the connector s shall be used P 8 5 20V GND C1 C2 C5 C8 C11 C14 C21 C31 C41 C51 C60 C70 C73 C76 C80 C84 C87 C90 C93 C96 C100 C103 C110 D1 D2 D5 D8 D11 D14 D21 D31 D41 D51 D60 D67 D70 D73 D76 D80 D84 D87 D90 D93 D96 D100 D103 D110 Ground DC power and signal and AC signal return path All available GND connector pins shall be used and tied to carrier board GND plane P ...

Page 32: ...26 Pinouts and Signal Descriptions This page intentionally left blank ...

Page 33: ...ectors and pinouts LEDs and switches that are used on the module but are not included in the PICMG standard specification 4 1 Connector Switch and LED Locations CD AB FAN LED1 4 pin Fan 40 pin Debug connector BIOS Defaults Reset Button LED2 LED3 Figure 3 Express SL2 Connector Switch and LED Locations ...

Page 34: ...28 Connector Pinouts on Module Express SL2 and the DB40 Debug Module For illustration purposes only Figure 4 Express SL2 and the DB40 Debug Module ...

Page 35: ...System power 3 3V provide from COM module 13 BMC Program interface cont d OCD0B Include a jumper to connect OCD0A via 1K0 pull up to 3 3V_BMC 32 GND 12 PWRBTN 31 BIOS_DIS0 11 SYS_RESET 30 RST 10 CB_RESET 29 CLK33_LPC 9 CB_PWROK 28 LPC_FRAME 8 SUS_S3 27 LPC_AD3 7 SUS_S4 26 LPC_AD2 6 Test points SUS_S5 25 LPC_AD1 always power 3 3V provide from COM module 5 POSTWDT_DIS Connect to Jumper for Debug 24 ...

Page 36: ...eption Codes below LED2 Green Power Source 3Vcc S0 LED ON S3 S4 S5 LED OFF ECO mode LED OFF LED3 Red BMC output and same signal as WDT B27 on BtB connector Module power up LED OFF Watchdog counting Keep Last State Watchdog timed out LED ON Watchdog RESET LED ON Rebooted after WD RESET LED ON Rebooted after PWRBTN LED OFF Rebooted after RESET BTN LED OFF Note only a RESET not initiated by the BMC c...

Page 37: ...onnector Pinouts on Module 31 4 4 Fan Connector Connector Type JVE 24W1125A 04M00 Pin Orientation 1 2 3 4 Pin Assignment Name Description 1 FAN_PWMOUT 2 FAN_TACHIN 3 Ground 4 5V Table 4 Fan Connector Pin Definition ...

Page 38: ... perform the following steps 1 Shut down the system 2 Press the BIOS Setup Defaults RESET Button continuously and boot up the system You can release the button when the BIOS prompt screen appears 3 The BIOS prompt screen will display a confirmation that BIOS defaults have been reset and request that you reboot the system ...

Page 39: ...Express Switch Locations 4 6 1 PCI Express Configuration Switch The PCI Express Configuration Switch allows you to configure the PCI Express x16 lanes from the CPU as 1 PCIe x16 2 PCIe x8 or 1 PCIe x8 2 PCIe x4 Mode Pin 1 Pin 2 1x PCIe x16 default Off Off 2x PCIe x8 On Off 1x PCIe x8 2x PCIe x4 On On Reserved Off On Table 5 PCI Express Configuration Switch Settings ...

Page 40: ...ilsafe mode both BIOS chips on the module are configured as SPI1 Only one of the two is connected to the SPI bus at any given time In case of failure of the primary SPI1 BIOS the system will reboot and switch to the secondary SPI1 BIOS on the module In Failsafe mode the SPI0 BIOS socket on the carrier can be populated In either mode BIOS Select and Mode Configuration Switch Pin 1 is used to select...

Page 41: ... Card on the Express BASE Reference Carrier to support bifurbication of the CPU s PEG interface PCIe x16 The card reroutes the PCIe x16 to two x8 and allows testing of two independent PCIe add on cards with x8 x4 x2 x1 width To use the card set SW1 to 2 x8 PCI Express as above PCIex16 to two x8 Adapter Card Model P16TO28 Part No 91 79301 0010 ...

Page 42: ...36 Connector Pinouts on Module This page intentionally left blank ...

Page 43: ... are stored in flash Power cycles counter Boot counter Counts the number of boot attempts Watchdog Timer Set Reset Disable Watchdog Timer Features auto reload at power up System Restart Cause Power loss BIOS Fail Watchdog Internal Reset External Reset Fail safe BIOS support In case of a boot failure hardware signals tells external logic to boot from fail safe BIOS Flash area 1kB Flash area for cus...

Page 44: ...IN CURRENT Use Main Current Function Table 7 SEMA Onboard Voltage Monitor 5 1 2 Main Current The BMC of the Express SL2 implements a current monitor The current can be read by calling the SEMA function Get Main Current The function returns four 16 bit values divided in high byte MSB and low byte LSB These 4 values represent the last 4 currents drawn by the board The values are sampled every 250ms ...

Page 45: ...xception Code Error Message 0 NOERROR 2 NO_SUSCLK 3 NO_SLP_S5 4 NO_SLP_S4 5 NO_SLP_S3 6 NO_CB_PWRGD 7 BIOS_FAIL 8 RESET_FAIL 9 RESETIN_FAIL 10 CRITICAL_TEMP 11 POWER_FAIL 12 VOLTAGE_FAIL 13 NO_SYS_GD 14 NO_3V3_A_PGD 15 NO_VDDQ_PG 16 NO_P_5V_3V3_S0_PG 17 NO_1V0_A_PG 18 NO_VCORE_PG 19 MEMORY_ERROR Table 9 SEMA Exception Codes 5 1 5 BMC Flags The BMC Flags register returns the last detected Exception...

Page 46: ...40 Smart Embedded Management Agent SEMA This page intentionally left blank ...

Page 47: ...MB DOS Compatibility Memory 6 2 Direct Memory Access Channels Channel Number Data Width System Resource 0 8 bits Generic 1 8 bits Generic 2 8 bits Generic 3 8 bits Generic 4 Reserved cascade channel 5 16 bits Generic 6 16 bits Generic 7 16 bits Generic 6 3 I O Map Hex Range Device 20h 21h Interrupt Controller 24h 25h Interrupt Controller 28h 29h Interrupt Controller 2Ch 2Dh Interrupt Controller 02...

Page 48: ...C Controller 80h LPC eSPI or PCIe 84h 86h Reserved 88h Reserved 8Ch 8Eh Reserved 90h Alias to 80h 092 Reset Generator 94h 96h Aliases to 8xh 98h Alias to 88h 9Ch 9Eh Alias to 8xh A0h A1h Interrupt Controller A4h A5h Interrupt Controller A8h A9h Interrupt Controller ACh ADh Interrupt Controller B0h B1h Interrupt Controller B2h B3h Interrupt Controller B4h B5h Interrupt Controller B8h B9h Interrupt ...

Page 49: ...PIRQ Note 1 12 PS 2 Mouse IRQ12 via SERIRQ PIRQ Note 1 13 GSPI UART I2C SDIO N A Note 1 14 Gpio PIRQ Note 1 15 Gpio PIRQ Note 1 Note 1 These IRQs can be used for PCI devices when onboard device is disabled APIC Mode IRQ Typical Intterupt Resource Connected to Pin Available 0 Counter 0 N A No 1 Keyboard controller IRQ1 via SERIRQ No 2 Cascade interrupt from slave PIC N A No 3 Serial Port 4 COM4 IRQ...

Page 50: ...ion 00h 00h 00h N A Intel host Bridge 00h 02h 00h Internal Intel I G D 00h 08h 00h Internal Gaussian Mixture Model 00h 14h 00h Internal xHCI Controller 00h 16h 00h Internal Intel Management Engine Interface 00h 17h 00h Internal Intel AHCI controller 00h 1Ch 00h Internal Intel PCI Express Root port 1 00h 1Ch 01h Internal Intel PCI Express Root port 2 00h 1Ch 02h Internal Intel PCI Express Root port...

Page 51: ...t 7 PCIE Port 8 Int0 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 Int1 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 Int2 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 Int3 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INT Line LPC Controller SATA Controller SMBus Controller Thermal Subsystem Int0 INTA 16 INTA 16 INTA 16 Int1...

Page 52: ...46 System Resources This page intentionally left blank ...

Page 53: ...in bold and the function of each setting is described in the right hand column of the respective table Main Advanced Security Boot Save Exit BIOS Information Processor Information PCH Information SPI Clock Frequency System Management System Date System Time CPU Memory Graphics SATA USB Network PCI and PCIe Super IO ACPI and Power Management Sound Serial Port Console ICC Thermal Miscellaneous Passw...

Page 54: ...ly Display CPU Brand Name CPU Signature Info only Display CPU Signature CPU Speed Info only Display CPU Frequency Processor ID Info only Display CPU ID Stepping Info only Display CPU Stepping Number of Processors Info only Display number of Processors GT Info Info only Display GT info of Intel Graphics IGFX VBIOS Version Info only Display VBIOS Version Memory RC Version Info only Display memory ve...

Page 55: ...d only Display SMC hardware Version Serial Number Read only Display SMC serial Number Manufacturing Date Read only Display SMC manufacturing date Last Repair Date Read only Display SMC last repair date MAC ID Read only Display SMC MAC ID 7 2 5 2 System Management Temperatures and Fan Speed Feature Options Description Temperatures and Fan Info only CPU Temperature Info only Current Read only Displa...

Page 56: ...ature Options Description Runtime Statistics Info only Total Runtime Read only The returned value specifies the total time in minutes the system is running in S0 state Current Runtime Read only The returned value specifies the time in seconds the system is running in S0 state This counter is cleared when the system is removed from the external power supply Power Cycles Read only The returned value...

Page 57: ... power failure the system will automatically power on when power is restored 7 2 5 7 System Management LVDS Backlight Feature Options Description LVDS Backlight Info only LVDS Backlight Bright 255 The value range starts by 0 and ends by 255 7 2 5 8 System Management Smart Fan Feature Options Description Smart Fan Info only CPU Smart FanTemperature Source CPU Sensor System Sensor Select CPU smart f...

Page 58: ...only one thread per enabled core is enabled VT d Disabled Enabled Check to enable VT d function on MCH Intel VMX Virtualization Technology Disabled Enabled Enable Disable support for the Intel virtualization technology Intel R SpeedStep TM Disabled Enabled Allows more than two frequency ranges to be supported Turbo Mode Disabled Enabled Enable Disable turbo mode Configurable TDP Boot Mode Nominal ...

Page 59: ...t Auto C2 C3 C6 C7 Auto Package C State limit DTS SMM Disabled Enabled Enable Disable CPU DTS ACPI T states Disabled Enabled Enable Disable ACPI 3 0 T States 7 3 2 Memory Feature Options Description Memory RC Version Info only Display Memory Reference Code Version Memory Frequency Info only Display Memory Frequency Total Memory Info only Display Total Memory VDD Info only Display Memory Voltage DI...

Page 60: ...0 2400 2600 2667 2800 2933 3000 3200 3467 3733 4000 4133 Maximun Memory Frequency Selections in MHz Max TOLUD Dynamic 1 GB 1 25 GB 1 5 GB 1 75 GB 2 GB 2 25 GB 2 5 GB 2 75 GB 3 GB 3 25 GB Maximum Value of TOLUD Dynamic assignment would adjust TOLUD automatically based on largest MMIO length of installed graphic controller ...

Page 61: ...2 F3 Graphics device should be Primary PCIE Internal Graphics Auto Disabled Enable Keep IGD enabled based on the setup options Aperture Size 128MB 256MB 512MB 1024MB 2048MB 4096MB Select the Aperture Size DVMT Pre Allocated XXM Select DVMT 5 0 Pre Allocated Fixed Graphics Memory size used by the Internal Graphics Device DVMT Total Gfx Mem XXXM Select DVMT5 0 Total Graphic Memory size used by the I...

Page 62: ...le DDI port 2 function choose to Display Port or HDMI Primary IGFX Boot Display VBIOS Default Select the Video Device which will be activated during POS Select Secondary Display Disabled Select Secondary Display Device LCD Panel Type VBIOS Default 640X480 800X600 1024X768 1280X1024 1400X1050 1600X1200 1366X768 1680X1050 1920X1200 1440X900 1600X900 1024X768 LVDS2 1280X800 1920X1080 2048X1536 Select...

Page 63: ...serve Info only Port X Disabled Enabled Enable Disable SATA Port Hot Plug Disabled Enabled Designates this port as Hot Pluggable Configured as eSATA Info only Spin up Device Disabled Enabled If enabled for any of ports Staggerred Spin Up will be performed and only the drives which have this option enabled will spin up at boot Otherwise all drives spin up at boot SATA Device Type Hard Disk Drive So...

Page 64: ...abled Disabled This is a workaround for OSes without XHCI hand off support The XHCI ownership change should be claimed by the XHCI OS driver USB Mass Storage Driver Support Enabled Disabled Enable Disable USB Mass Storage Driver Support Port 60 64 Emulation Enabled Disabled Enables I O port 60h 64h emulation support This should be enabled for the complete USB keyboard legacy support for non USB aw...

Page 65: ...s MEBx Selection Screen Enabled Disabled OEMFLag Bit 2 Enable MEBx selection screen with 2 options Press 1 to enter ME Configuration Screens Press 2 to initiate a remote connection Note Network Access must be activated from MEBx Setup for this screen to be displayed Hide Un Configure ME Confirmation Prompt Enabled Disabled OEMFlag Bit 6 Hide Unconfigure ME confirmation prompt when attempting ME un...

Page 66: ...s Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bus Clocks Value to be programmed into PCI Latency Timer Register PCI X Latency Timer 32 PCI Bus Clocks 64 PCI Bus Clocks 96 PCI Bus Clocks 128 PCI Bus Clocks 160 PCI Bus Clocks 192 PCI Bus Clocks 224 PCI Bus Clocks 248 PCI Bus Clocks Value to be programmed into PCI Latency Timer Register VGA Palette Snoop...

Page 67: ...s Disabled Enable Override SW EQ settings PCI and PCIe PCI Express Configuration PCI Express Root Port X Feature Options Description PCI Express Root Port Disabled Enable Control the PCI Express Root Port Topology Unknown x1 x4 Sata Express M2 Identify the SATA Topology Default ISATA Flex DirectConnect or M2 ASPM Support Disabled L0s L1 L0sL1 Auto Set the ASPM Level Force L0s Force all links to L0...

Page 68: ... Enabled Transmitter Half Swing Enable Disable Detect Non Compiance Disabled Enable Detect Non Compliance PCI Express Device If enabled it will take more time at POST time Detect Timeout 0 The number of milliseconds reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port Extra Bus Reserved 0 Extra Bus Reserved 0...

Page 69: ...Select the scale used for the Slot Power Limit Value PEGX Physical Slot Number 1 Set the physical slot number attached to this Port The number has to be globally unique within the chassis Values 0 8191 Detect Non compliance Device Disabled Enable Detect Non Compliance PCI Express Device in PEG Program PCIe ASPM after OpROM Disabled Enabled Enabled PCIe ASPM will be programmed after OpROM Disabled ...

Page 70: ...to will current default Enabled Jitter Dwell Time 3000 PEG Gen3 Preset Search dwell time 0 65535 in usec Jitter Error Target 2 The margin search error target value 1 65535 VOC Dwell Time 10000 The VOC margin search dwell time 0 65535 in usec VOC Error Target 2 The VOC margin search error target value 1 65535 Generate BDAT PEG Margin Data Disabled Enabled Enable to generate BDAT PCIe margin tables ...

Page 71: ... IO 2F8h IRQ 4 Auto IO 2F8h IRQ 3 IO 3F8h IRQ 3 4 5 6 7 10 11 12 IO 2F8h IRQ 3 4 5 6 7 10 11 12 IO 3E8h IRQ 3 4 5 6 7 10 11 12 IO 2E8h IRQ 3 4 5 6 7 10 11 12 Standard Serial Port Mode IrDA Active pulse 1 6 uS IrDA Active pulse 3 16 bit time ASKIR Mode Enable Disable Serial Port COM Fixed configuration of serial port Select an optimal setting for Super IO device Parallel Port Configuration Info onl...

Page 72: ...utually exclusive with Smart connect Emulation AT ATX Emulation AT ATX Select Emulation AT or ATX function If this option set to Emulation AT BIOS will report no suspend functions to ACPI OS In windows XP it will make OS show shutdown message during system shutdown 7 3 10 Sound Feature Options Description Sound Info only HD Audio Disabled Enabled Auto Control Detection of the HD Audio device Disab...

Page 73: ...le VT UTF8 Combination Key Support for ANSI VT100 terminals Recorder Mode Disabled Enable With this mode enabled only text will be sent This is to capture Terminal data Resolution 100x31 Disabled Enable Enables or disables extended terminal resolution Legacy OS Redirection 80x24 80x25 On Legacy OS the Number of Rows and Columns supported redirection Putty KeyPad VT100 LINUX XTERMR6 SCO ESCN VT400 ...

Page 74: ...ions Description Security Device Support Enabled Disabled Enables or Disables BIOS support for security device When disabled OS wil not show Security Device TCG EFI protocol and INT1A interface will not be available TPM State Enabled Disabled Enable Disable Security Device NOTE Your Computer will reboot during restart in order to change State of the Device Pending operation None TPM Clear Schedule...

Page 75: ...required to launch active boot option Has no effect for BBS boot options Boot Option Priorities Info only 7 4 1 1 CSM Configuration Feature Options Description CSM Support Enabled Disable This option controls if CSM will be launched CSM16 Module Version Info only GateA20 Active Upon Request Always UPON REQUEST GA20 can be disabled using BIOS services ALWAYS do not allow disabling GA20 this option ...

Page 76: ...istrator Password Enter password User Password Enter password Secure Boot Submenu Customizable Secure Boot settings System Mode Info only Secure Boot Info only Vender Keys Info only Attempt Secure Boot Disabled Enabled Secure Boot activated when Platform Key PK is enrolled System mode is User Deployed and CSM function is disabled Secure Boot Mode Standard Custom Secure Boot Mode Custom Standard Se...

Page 77: ... changes Discard Changes and Reset 7 6 2 Save Options Feature Options Description Save Changes Save Changes done so far to any of the setup options Discard Changes Discard Changes done so far to any of the setup options Restore Defaults Restore Load Default values for all the setup options Save as User Defaults Save the changes done so far as User Defaults Restore User Defaults Restore the User De...

Page 78: ...72 BIOS Setup This page intentionally left blank ...

Page 79: ...d by the Intel Platform Innovation Framework for EFI the Framework The Framework refers the following boot phases which may apply to various status code checkpoint descriptions Security SEC initial low level initialization Pre EFI Initialization PEI memory initialization1 Driver Execution Environment DXE main hardware initialization2 Boot Device Selection BDS system setup pre OS user interface sel...

Page 80: ...covery errors PEI 8 2 Standard Status Codes 8 2 1 SEC Phase Status Code Description 0x00 Not used Progress Codes 0x01 Power on Reset type detection soft hard 0x02 AP initialization before microcode loading 0x03 North Bridge initialization before microcode loading 0x04 South Bridge initialization before microcode loading 0x05 OEM initialization before microcode loading 0x06 Microcode loading 0x07 A...

Page 81: ...th Bridge initialization North Bridge module specific 0x19 Pre memory South Bridge initialization is started 0x1A Pre memory South Bridge initialization South Bridge module specific 0x1B Pre memory South Bridge initialization South Bridge module specific 0x1C Pre memory South Bridge initialization South Bridge module specific 0x1D 0x2A OEM pre memory initialization codes 0x2B Memory initialization...

Page 82: ...dge module specific 0x3F 0x4E OEM post memory initialization codes 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error Invalid memory type or incompatible memory speed 0x51 Memory initialization error SPD reading has failed 0x52 Memory initialization error Invalid memory size or memory modules do not match 0x53 Memory initialization error No usable memory detected 0x54 Unspeci...

Page 83: ...rocess started 0xF3 Recovery firmware image is found 0xF4 Recovery firmware image is loaded 0xF5 0xF7 Reserved for future AMI progress codes Recovery Error Codes 0xF8 Recovery PPI is not available 0xF9 Recovery capsule is not found 0xFA Invalid recovery capsule 0xFB 0xFF Reserved for future AMI error codes 8 2 4 PEI Beep Codes of Beeps Description 1 Memory not Installed 1 Memory was installed twic...

Page 84: ...pecific 0x6E North Bridge DXE initialization North Bridge module specific 0x6F North Bridge DXE initialization North Bridge module specific 0x70 South Bridge DXE initialization is started 0x71 South Bridge DXE SMM initialization is started 0x72 South Bridge devices initialization 0x73 South Bridge DXE Initialization South Bridge module specific 0x74 South Bridge DXE Initialization South Bridge mod...

Page 85: ...0xA3 IDE Enable 0xA4 SCSI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup 0xAA Reserved for ASL see ASL Status Codes section below 0xAB Setup Input Wait 0xAC Reserved for ASL see ASL Status Codes section below 0xAD Ready To Boot event 0xAE Legacy Boot event 0xAF Exit Boot Services event 0xB0 Runtime Set Virtual Address M...

Page 86: ...Error loading Boot Option LoadImage returned error 0xDA Boot Option is failed StartImage returned error 0xDB Flash update is failed 0xDC Reset protocol is not available 8 2 6 DXE Beep Codes of Beeps Description 1 Invalid password 4 Some of the Architectural Protocols are not available 5 No Console Output Devices are found 5 No Console Input Devices are found 6 Flash update is failed 7 Reset protoc...

Page 87: ...ransitioned into ACPI mode Interrupt controller is in PIC mode 0xAA System has transitioned into ACPI mode Interrupt controller is in APIC mode 8 3 OEM Reserved Checkpoint Ranges Status Code Description 0x05 OEM SEC initialization before microcode loading 0x0A OEM SEC initialization after microcode loading 0x1D 0x2A OEM pre memory initialization codes 0x3F 0x4E OEM PEI post memory initialization c...

Page 88: ...82 BIOS Checkpoints Beep Codes This page intentionally left blank ...

Page 89: ... to board connector with 0 5mm for a stacking height of 5 mm This connector can be used with 5 mm through hole standoffs SMT type Tyco 3 6318491 6 Foxconn QT002206 4141 3H 220 pin board to board connector with 0 5mm for a stacking height of 8 mm This connector can be used with 8 mm through hole standoffs SMT type Common Specifications Current capacity 0 5A per pin Rated voltage 50 VAC Insulation r...

Page 90: ... with all COM Express modules 9 2 2 Heat Sinks A heat sink can be used as a thermal solution for a specific COM Express module and can have a fan or be fanless depending on the thermal requirements 9 2 3 Installation Install a heat spreader or heat sink using the following instructions Step 1 Before mounting the heatsink install the required memory modules onto the SODIMM socket s on the COM Expre...

Page 91: ...Express SL2 uses two screws to attach the heatsink to the COM Express module Step 4 Place the COM Express module and heatsink assembly onto the connectors on the carrier board as shown Then press down on the module until it is firmly seated on the carrier board Step 5 Use the five M2 5 L 16mm screws provided to secure the COM Express module to the carrier board from the solder side ...

Page 92: ...86 Mechanical Information Step 6 If you are installing a heatsink with a fan plug the fan connector into the carrier board as shown ...

Page 93: ...the choice of 5 mm or 8mm board to board connectors there is the choice of Top and Bottom mounting In Top mounting the threaded standoffs are on the carrier board and the thermal solution is equipped with through hole standoffs In Bottom mounting the threaded standoffs are on the thermal solution and the carrier board has through hole standoffs Figure 6 COM Express Mounting Methods ...

Page 94: ...offs are DIP type and through hole standoffs are SMT type Other types not listed are available upon request 5mm through hole standoff SMT type P N 33 72000 0050 5mm threaded standoff DIP type P N 33 72016 0050 8mm through hole standoff SMT type P N 33 72000 0080 8mm threaded standoff DIP type P N 33 72015 0050 Figure 7 COM Express Standoff Types ...

Page 95: ...cables To avoid electrical shock and or damage to equipment Keep equipment away from water or liquid sources Keep equipment away from high heat or high humidity Keep equipment properly ventilated do not block or cover ventilation openings Make sure to use recommended voltage and power source settings Always install and operate equipment near an easily accessible electrical socket outlet Secure the...

Page 96: ...360 0200 Toll Free 1 800 966 5200 USA only Fax 1 408 360 0222 Email info adlinktech com ADLINK Technology China Co Ltd Address 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 China Tel 86 21 5132 8988 Fax 86 21 5132 3588 Email market adlinktech com ADLINK Technology GmbH Address Hans Thoma Strasse 11 D 68163 Mannheim Germany Tel 49 621 43214 0 Fax 49 621 43214 30 Email eme...

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