ADLINK Technology cPCI-6930, User Manual

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Specifications 7
cPCI-6930
2 Specifications
2.1 cPCI-6930 Blade Specifications
CompactPCI®
Standards • PICMG® 2.0 CompactPCI® Rev. 3.0
• PICMG® 2.1 Hot Swap Specification Rev.2.0
• PICMG® 2.9 System Management Bus Rev. 1.0
• PCIMG® 2.16 Packet Switching Backplane Rev.1.0
Mechanical • Standard 6U CompactPCI®
• Board size: 233.35mm x 160mm
• Dual slot (8HP, 40.64mm) width for cPCI-6930D
• CompactPCI® connectors with J1, J2, J3 and J5
Processor 32nm Intel® Xeon® processor in LGA1356 socket
• 8-core Xeon® Processor E5-2448L, 1.8 GHz, 20MB LLC
cache, TDP 70W
• 6-core Xeon® Processor E5-2428L, 1.8 GHz, 15MB LLC
cache, TDP 60W
• 4-core Xeon® Processor E5-2418L, 2.0 GHz, 10MB LLC
cache, TDP 50W
• Passive heatsink
Chipset • Intel® BD82C604 Platform Controller Hub (PCH)
Host Memory • Three channel DDR3-1333/1600 ECC registered memory
• Three RDIMM sockets
• Up to 48GB (dependent on availability of memory modules)
CompactPCI
Bus • PCI 64-bit/66MHz; 3.3V, 5V universal V(I/O)
• Supports operation in system slot as master or in peripheral
slot as standalone blade without connectivity to
CompactPCI bus (Satellite mode)
PMC/XMC • One 32/64-bit, 33/66/133MHz PMC site or PCI-Express x8
XMC site on DB-6930L2 riser card
Graphics • Silicon Motion SM750 2D GPU
• 16MB embedded 32-bit DDR memory at 166MHz
• One analog RGB output to front panel VGA port; second
RGB output to J3.
• Supports resolutions up to 1920x1440
Gigabit
Ethernet • One Intel® 82580 Gigabit Ethernet controller for 4x
10/100/1000BASE-T ports on front panel
• Two Intel® 82574L Gigabit Ethernet controllers for 2x
10/100/1000BASE-T port to J3 for PICMG 2.16
Table 2-1: cPCI-6930 Blade Specifications