36
+2.5V
EEPROM1 24C16
SDA
SCL
VCC
+5V
MICRO CONTROLLER
Winbond
HDAT
A
0
MF
B
7
MF
B
8
MF
B
9
HCL
K
HF
S
RXD
TXD
IR
Q
SDA
SCL
VCC
TC
LK1
RST
RST
1
MF
B
1
MF
B
2
/VGA_CON
XTAL
1
XTAL
2
PANEL(HYUNDAI-300)
TX0-/+E
TX0-/+O
TX1-/+O
TX1-/+E
TX2-/+E
TX2-/+O
TX3-/+O
TX3-/+E
TXC-/+E
TXC-/+O
VCC
LVDS2
NT7181
OBLU[0-7]
OGRN[0-7]
ORED[0-7]
TXCLKIN
PHS
PVS
DENABLE
/PWRDWN
VCC
TX0-/+O
TX1-/+O
TX2-/+O
TX3-/+O
TXC-/+O
715L820-2-2
A
BLOCK DIAGRAM
SIEMENS 43B1-M
B
1
1
Monday, July 29, 2002
Title
Size
Document Number
Rev
Date:
Sheet
of
RT9164-2.5V
CRYSTAL2
50MHZ
OUT
VCC
+2.5V
+3.3V
LM2596-5.0V
+5.0V
+12V
+5V
+5V
+5V
+3.3V
ZAN2
SCALER
TC
LK1
+3
.3
V
MFB2
MFB7
MFB8
MFB9
HCL
K
HF
S
IR
Q
HDATA0
RST
RST
1
MFB1
PDISPE
PVS
PHS
PCLK
OBLU
OGRN
ORED
EBLU
EGRN
ERED
+2
.5
V
BLUE
RED
GREEN
HSYNC/CS
VSYNC
LVDSEN
TCLK
AIC1084-3.3V
+3.3V
EEPROM
24LC21A
SDA
SCL
VCC
+5V
CRYSTAL1 20MHZ
X1
X2
LVDS1
NT7181
ERED[0-7]
EGRN[0-7]
EBLU[0-7]
TXCLKIN
PHS
PVS
DENABLE
/PWRDWN
VCC
TX0-/+E
TX1-/+E
TX2-/+E
TX3-/+E
TXC-/+E
POWER
+5V
+3.3V
12V
+2.5V
+3.3V
INPUT
R
G
H-SYNC
V-SYNC
B
/VGA_CON
RXD
TXD
VG
A_
SDA
VG
A_
SCL
11.
SCHEMATIC DIAGRAM
TOP-LEVEL FLOW
.Gmzan2 block
MCU
LVDS block
ACER