20
Chapter 2
Processor Configuration
Parameter
Description
Option
Hardware Prefetcher
Enables or disables the speculative unit within the processor.
Enabled
Disabled
Adjacent Cache Line
Prefetch
When Enabled, cache lines are fetched in pairs (even line + odd line).
When Disabled, only current cache line required is fetched.
Enabled
Disabled
Max CPUID Value Limit
Enables or disables legacy operating system to boot processors with
extended CPUID functions.
Disabled
Enabled
Intel VT
Enables or disables the Virtualization Technology (VT) availability. If
enabled, a virtual machine manager (VMM) can utilize the additional
hardware virtualization capabilities provided by this technology.
Note:
A full reset is required to change the setting.
Enabled
Disabled
Intel XD Bit
When Enabled, the processor disables code execution when a worm
attempts to insert a code in the buffer preventing damage and worm
propagation.
When Disabled, the processor forces the Execute Disable Bit feature
flag to always return to 0.
Enabled
Disabled
Core Multi-Processing
Enables or disables core multi-processing function.
Enabled
Disabled
PECI
Enables or disables the PECi function.
Enabled
Disabled
Intel EIST
Enables or disables the EIST function.
Enabled
Disabled
Summary of Contents for Aspire X3810
Page 38: ...30 Chapter 2 ...
Page 55: ...Chapter 3 47 9 Disconnect the VGA card cable from the mainboard ...
Page 77: ...Chapter 5 69 System Block Diagram System Block Diagram and Board Layout Chapter 5 ...
Page 82: ...74 Chapter 6 X3810 X5810 Exploded Diagram ...
Page 102: ...94 Chapter 6 ...
Page 110: ...Appendix A 102 ...