Acer AL2616W, Service Manual

Page: 47 / 50

MST9251A
+3.3DV1
RX0-
FSADDR[0..11] 3
AD1
TXB2-
RXC-
DN:VOL_PWM from MST9251
INT 4
AD3
RX1- 2
C428
0.1uF
+3.3DV2
FSDATAU24
RX2-
FSDQM0U
FSADDR6
C420
0.1uF
+2.5MVDD
WR
FSDATAU14
TXB0+
TXB0-
RX1+
TXAC-
FSADDR1
R437
1.2K 1/10W
C419 47pF
RXC+
XTAL
TXAC+
RD 4
AD2
FSDQSU2 3
FSBKSEL0
CONNECTOR for PANEL
HWRESET
TXA2-
INT
TXB1+
+2.5MVDD 6
FSDATAU23
FSDATAU26
TXA1+
MST9251A(208Pin)
U401
168
167
166
165
164
161
160
180
179
178
177
176
175
174
131
205
44
43
42
41
40
39
38
37
18
15
14
11
9
8
6
5
26
25
24
23
22
21
20
19
1
208
2
3
207
36
33
32
31
30
29
28
27
45
46
47
48
80
49
51
54
55
10 34 173 17 195 125 109 86
56
204 113 156
58
59
60
61
16 35
12
50
57
157 64 183 184 7 132 155 172
158
169
185 102 4
87
170
171
108 159 140 13
62
67
68
69
70
71
72
73
74
75
76
78
201
135
136
137
138
141
142
143
144
145
146
147
148
149
150
151
152
133
105
107
110
111
112
115
116
117
118
119
120
121
122
123
124
127
128
129
65
181
186
187
66 63
202
203
163
52
53
103
77
81
82
83
84
85
154
114
88
89
90
91
92
93
126
139
94
95
96
97
98
99
100
101
106
104
130
134
153
200
79
206
162
194
182 188 189 190 191 192 193 196 197 198 199
LVA1P
LVA2M
LVA2P
LVACKM
LVACKP
LVA3M
LVA3P
LVB1P
LVB2M
LVB2P
LVBCKM
LVBCKP
LVB3M
LVB3P
VDDC
GND
VI_DATA[11]
VI_DATA[10]
VI_DATA[9]
VI_DATA[8]
REFM
REFP
RMID
VSYNC0
HSYNC1
DDCD_CK
DDCD_DA
REXT
DVI_CK-
DVI_B-
DVI_B+
RIN1M
RIN1
GIN1M
GIN1
SOGIN1
BIN1M
BIN1
VSYNC1
GND
DVI_R-
DVI_G+
DVI_G-
DVI_R+
HSYNC0
RIN0
RIN0M
SOGIN0
GIN0
GIN0M
BIN0
BIN0M
VI_DATA[12]
VI_DATA[13]
VI_DATA[14]
VI_DATA[15]
GND
AVDD_
APL
L
GPIO[5]/VHS
VI_DATA[0]
VI_DATA[1]
AVDD_
DVI
AVDD_
ADC
VDDC
AVDD_
ADC
VDDC VDDM
AVDD_
PL
L2
VDDM
VI_DATA[2]
AVDD_
M
P
LL
VDDM VDDC
VI_DATA[4]
VI_DATA[5]
VI_DATA[6]
VI_DATA[7]
GND GND
AVDD_
PL
L
GND
VI_DATA[3]
GND GND GND GND GND GND GND GND
BYPASS
LVA1M
VDDC VDDM
AVDD_
DVI
GND
LVA0P
LVA0M
GND GND GND GND
VCTRL
HWRESET
INT
ALE
RDZ
WRZ
DBUS[0]
DBUS[1]
DBUS[2]
DBUS[3]
GPIO[3]/VDE
GPIO[1]/FIELD
PWM1
MDATA[15]
MDATA[14]
MDATA[13]
MDATA[12]
MDATA[11]
MDATA[10]
MDATA[9]
MDATA[8]
MDATA[7]
MDATA[6]
MDATA[5]
MDATA[4]
MDATA[3]
MDATA[2]
MDATA[1]
MDATA[0]
DQM[0]
MCLKE
MCLK
BADR[1]
BADR[0]
RASZ
CASZ
WEZ
MADR[0]
MADR[1]
MADR[2]
MADR[3]
MADR[4]
MADR[5]
MADR[6]
MADR[7]
MADR[8]
MADR[9]
MADR[10]
GND
LVB1M
LVB0P
LVB0M
VDDP VDDC
XOUT
XIN
GND
GPIO[4]/VCLK2
VI_CK
GND
GPIO[2]/VVS
DQS[3]
MDATA[31]
MDATA[30]
MDATA[29]
MDATA[28]
VDDM
GND
MDATA[27]
MDATA[26]
MDATA[25]
MDATA[24]
MDATA[23]
MDATA[22]
GND
VDDM
MDATA[21]
MDATA[20]
MDATA[19]
MDATA[18]
MDATA[17]
MDATA[16]
DQS[2]
DQM[1]
MCLKZ
MVREF
MADR[11]
DQS[1]
DQS[0]
PWM0
VDDC
GND
VDDP
GND
VDDP
NC NC NC NC NC NC NC NC NC NC
AVDD_DVI 6
DVI_SDA 2
FSCKE 3
FSADDR1
FSDQM1U
RXC-
Panel_Power 6
AD0
FSDATAU16
RD
FSDATAU13
TXB3-
FSDATAU6
TXBC+
FSADDR11
WR 4
FSDATAU5
ADJ_PWM 6
TXBC-
FSADDR3
/FSCAS
RXC- 2
TXB1-
DV
I IN
PU
T
FSDQSU0 3
FSADDR2
+
C424
22uF/16V
TXB3+
/FSRAS
TXA1+
TXA3+
FSDQSU3 3
Remove Addr/Comm
RN9/RN10/RN11/RN12/RN13
04/13
FSBKSEL0 3
FSDATAU19
TXA0-
RX0- 2
2
TXB2+
AVDD_PLL 6
TXB1+
C425
0.1uF
FSCLK- 3
FSADDR11
FSDATAU10
FSADDR5
RX2+
RED0- 2
CN407
CONN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
AVDDPLL2 6
FSADDR9
TXAC-
FSDATAU21
FSCLK+ 3
FSCLK+
FSADDR2
RX1-
AVS0 2
TXBC-
ALE
C422
0.1uF
TXBC+
MVref
+2.5MVDD
ADJ_PWM
FSADDR8
MVref
FSDATAU0
FSDATAU3
R436
1K 1/10W
AVDD_DVI
FSADDR5
FSADDR6
RX0+ 2
FSADDR0
RX1-
AD[0..3]
AVDDPLL2
FSDATAU[0..31]
ALE 4
ALE
AVDD_DVI
GREEN0- 2
FSADDR4
FSDATAU20
FSDATAU2
DCR_EN
VGA
I
N
PU
T
FSDATAU29
RX1+
C423
0.001uF
VDD_MPLL 6
RED0+ 2
TXA3-
/FSWE
TXA0+
TXB0+
/FSCAS 3
TXA3-
RX0-
RXC+ 2
FSDATAU18
TXB2+
TXA3+
+APLL 6
GND
WR
R483
RX2-
TXB2-
TXB3+
FSBKSEL1 3
FSDATAU15
FSCLK-
C421
0.1uF
+APLL
FSADDR7
TXA1-
FSDATAU12
/FSRAS 3
FSADDR10
RX2- 2
DVI_SCL 2
RX0+
SOG0 2
FSADDR0
FSDATAU1
TXB1-
R438 33 1/10W
VDD_MPLL
GND
FSDATAU17
TXAC+
TXA2+
GND
FSDATAU31
FSDATAU22
X402
14.318MHz
HWRESET 4
TXA0+
L404
120 OHM
AVDDA 6
DCR_EN
FSDQM1 3
TXB3-
HWRESET
FSDATAU8
RD
FSDATAU30
FSDQM0 3
AVDD_PLL
For AOC LCD I/F-
F/W default set Odd/Even Swap.
4/13/93
FSADDR10
FSDATAU9
D
05. MST9251A/HA
C
5 6 Monday, June 19, 2006
MST9251A
Title
Size Document Number Rev
Date: Sheet of
TXA0-
R435
10K 1/10W
MVref
FSADDR7
FSADDR8
TCLK
FSCKE
FSDQSU1 3
TXA2+
C427 0.1uF
FSCLK+, FSCLK- should be routed
like a differentail pair
(5mm)
FSDATAU4
FSDATAU25
MCU
IN
TE
RFACE
RX1+ 2
TXA2-
TXB0-
R434 100 1/10W
VOL_PWM 4
R439 33 1/10W
VDDC
INT
RX2+
R440
390 1/10W
AD0
TXA1-
/FSWE 3
RXC+
FSDATAU7
BLUE0- 2
BLUE0+ 2
AHS0 2
AD2
FSADDR3
FSDATAU27
+3.3DV1 6
FSADDR4
AVDDA
AD[0..3] 4
VBR_OUT 4
FSDATAU28
VDDC 6
+3.3DV2 6
PLL_GND
AD3
Unloaded trace impedance on this interface is 90 Ohm
Loaded trace impedace with DRAM load is 65 Ohm (for 2.5 inch total trace
length)
RX2+ 2
AD1
FSBKSEL1
RX0+
C418
47pF
MVref
FSDATAU11
FSADDR9
FSDATAU[0..31] 3
47