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Manual PCI-WDG-CSM

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Summary of Contents for PCI-WDG-CSM

Page 1: ...10623 Roselle Street San Diego CA 92121 858 550 9559 FAX 858 550 7322 contactus accesio com www accesio com MODEL PCI WDG CSM USER MANUAL FILE MPCI WDG CSM F1d...

Page 2: ...nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 2001 2005 by ACCES I O Products Inc 10623 Roselle...

Page 3: ...parts not excluded by warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable...

Page 4: ...ower Good Connection 14 Connecting a Fan 14 Chapter 3 Option Selection 15 Figure 3 1 Option Selection 16 Chapter 4 Address Selection 17 Chapter 5 Programming 18 Monitor Functions 18 Table 5 1 Register...

Page 5: ...n both counters continue counting until zero is reached timeout When the counters 0 and 1 reach zero the reset or power good line is held low performing a hardware reset through a relay contact open c...

Page 6: ...I O connector h Un fused 5V DC output at the rear panel I O connector i Fan Drive Power return on internal terminal block j Fan Drive Power out on internal terminal block k Fan Reset can initiate a f...

Page 7: ...n IRQ interrupt request User must supply current limiting bias resistor in external circuitry Example Connect 5V through a 470 ohm or connect 24V through a 2 2K ohm resistor to the Anode with the Cath...

Page 8: ...d many possibilities exist for special modifications to suit unique requirements If your card includes any such modifications there will be an Addendum sheet inserted at the front of this manual and a...

Page 9: ...us register indication if 5 12 or 12 V exceed 6 of nominal Temp Alarm IRQ and status register indication at 122 F and above Temp Sensor 8 bit ADC LSB 0 7 F factory adjustable Buzzer Audio Alert signal...

Page 10: ...CHDOG RESET DELAY LSW STATU S R E GIS TER ADDRESS AND DEVICE DECODE PCI CONTROL LOGIC TE MP MON ITOR 1 16 DIV IRQ ACTIVE ADDR C ON TR OL P C I B U S 5V 12V MON ITOR PCI BUS CLK 33 3MHz JP3 ON EN DUAL...

Page 11: ...for usage of the various card options CD Software Installation The following instructions assume the CD ROM drive is drive D Please substitute the appropriate drive letter for your system as necessar...

Page 12: ...ding on the operating system and automatically finish installing the drivers 9 Run PCIfind exe to complete installing the card into the registry for Windows only and to determine the assigned resource...

Page 13: ...side of this connection must be connected on the NC side of the header You can determine which reset push button wire is hot by removing the reset pushbutton connector from the motherboard and measuri...

Page 14: ...ed connections are the black and red or yellow wires connected to FAN and FAN In the case of a three wire fan remove the black and red or yellow wires from the connector body and insert them black to...

Page 15: ...de the computer chassis The top terminal provides the active low watchdog output The next terminal provides a ground The third terminal provides the complementary active high of the first terminal out...

Page 16: ...Manual PCI WDG CSM 16 3 9 6 7 RELAY CONTROL ON EN J1 RP1 WDRST GROUND WDRST FAN POWER FAN POWER FAN RESET GND ATX K1 RELAY C NC Figure 3 1 Option Selection...

Page 17: ...the cards and the respective IRQs Alternatively Windows systems can be queried to determine which resources were assigned In these operating systems you can use either PCIFind or the Device Manager ut...

Page 18: ...ite to Counter 1 Base Address 2 Read Counter 2 Write to Counter 2 Base Address 3 Read Control Register Write to Control Register Base Address 4 Read Status Register Clear IRQ Enable IRQs Start Buzzer...

Page 19: ...ents of the Status Register Base Address 4 are as follows BD0 Watchdog counter refresh reminder Active low BD1 Temperature good Active high BD2 Isolated Input 1 status Same as input BD3 Isolated Input...

Page 20: ...lue before timeout occurs If that interrupt is used by a user defined ISR it s possible for that ISR to refresh the counters and thus avoid need for the main program loop to refresh the counters There...

Page 21: ...m can post its current status to a shared memory variable indicating that it is about to enter a long dedicated process calculations for a print job perhaps and that it might miss several of its promp...

Page 22: ...t 1 8 Watchdog Counter Enabled Output 9 5 VDC Unfused 1A max 10 5 VDC Unfused 1A max 11 5 VDC Unfused 1A max 12 5 VDC Unfused 1A max 13 130 2 KHz Square Wave while the Watchdog is enabled 14 Relay Pol...

Page 23: ...round General Purpose 3rd Terminal WDRST TTL Watchdog Output Active High 4th Terminal FAN RED 12V Fan Red or Yellow Wire 5th Terminal FAN BLACK Open Collector PWM Fan Black Wire Bottom Terminal FAN RE...

Page 24: ...one shot In mode 1 a low output pulse is provided with a period equal to the counter count down time Mode 2 Rate Generator This mode provides a divide by N capability where N is the count loaded into...

Page 25: ...yte format is a follows B7 B6 B5 B4 B3 B2 B1 B0 SC1 SC0 RW1 RW0 M2 M1 M0 BCD SC0 and SC1 These bits select the counter that the control byte is destined for SC1 SC0 Function 0 0 Program Counter 0 0 1...

Page 26: ...eral use and is selected for each counter by setting the RW0 and RW1 bits to ones Of course subsequent read load operations must be performed in pairs in this sequence or the sequencing flip flop in t...

Page 27: ...atched data After any latching operation of a counter the contents of its hold register must be read before any subsequent latches of that counter will have any effect If a status latch command is iss...

Page 28: ...anual or just want to give us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates 10623 R...

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