background image

Manual PCI-DIO-24DH 

18

Programming Example (C)

 

 
The following program fragment in C language illustrates the foregoing: 
  
 

const BASE_ADDRESS 0x300; 

 

outportb(BASE_A3, 0x89);  /*This instruction sets the mode to Mode 0, ports A and 

B as output, and port C as input. Since bit D7 is high, the 
output buffers are set to tristate condition. See item b. 
above.*/ 

 outportb(BASE_ADDRESS,0); 
 outportb(BASE_1,0); /*These instructions set the initial state of ports A and B 

to all zeroes. Port C is not set because it is configured as 
an input. See item c. above.*/  

 

outportb(BASE_A3, 0x09);  /*Enable the tristate output buffers by using the same 

control byte used to configure the PPI, but now set bit 
D7 low. See item d. above.*/ 

 

Programming Example (Basic)

 

  
The following example in BASIC is provided as a guide to assist you in developing your working software. 
In this example, the card base address is 2D0 hex and the I/O lines of group 0 are to be setup as follows:  
  
 Port 

 = 

Input 

 Port 

 = 

Output 

 

Port C Hi 

Input 

 

Port C Lo 

Output 

  

The first step is to configure the control register. Configure bits of the control register as: 
 

D7 1 Active 

Mode 

Set 

D6 0 Mode 

D5 0 Mode 

D4  1  Port A = input 
D3  1  Port C Hi = input 
D2 0 Mode 

D1  0  Port B = output 
D0  0  Port C Lo -= output 

 
This corresponds to 98 hex. If the card address is 2D0 hex, use the BASIC OUT command to write to the 
control register as follows: 
  
 10 

BASEADDR=&H2D0 

 20 

OUT 

B3,&H98 

  
To read the inputs at Port A and the upper nybble of Port C: 
  
 

30 

X=INP(BASEADDR)'Read Port A  

 40 

Y=INP(B2)/16'Read Port C Hi 

  
To set outputs high (1) at Port B and the lower nybble of Port C:  
  
 

50 

OUT B1,&HFF'Turn on all Port B bits 

 

60 

OUT B2,&HF'Turn on all bits of Port C lower nybble  

Summary of Contents for PCI-DIO-24D

Page 1: ...10623 Roselle Street San Diego CA 92121 858 550 9559 FAX 858 550 7322 contactus accesio com www accesio com MODELS PCI DIO 24D and PCI DIO 24H Digital I O Cards USER MANUAL FILE MPCI DIO 24DH G1q...

Page 2: ...S nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 2001 2005 by ACCES I O Products Inc 10623 Rosell...

Page 3: ...parts not excluded by warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable...

Page 4: ...ction Map version D 12 Figure 3 2 Option Selection Map version H 12 Chapter 4 Address Selection 13 Chapter 5 Software 14 Chapter 6 Programming 15 Table 6 1 Address Assignment Table 15 Table 6 2 Contro...

Page 5: ...while I O connections to the H are via a 50 pin connector The cards are 4 8 inches long and may be installed in any 5V PCI bus slot in IBM and compatible personal computers These cards provide 24 bit...

Page 6: ...3 of Port C if the IRQD jumper is installed and the INTSEL0 jumper is installed in the INT position When bit C3 goes high edge triggering an interrupt is requested For the H model card a rising edge...

Page 7: ...MHz crystal controlled oscillator Active Count Edge Negative edge falling edge Min Clock Pulse Width 30 ns high 40 ns low Timer Range 16 bits x3 per i8254 Power Output Resettable 0 5A fused 5 VDC from...

Page 8: ...Manual PCI DIO 24DH 8 Figure 1 1 Card D or H Block Diagram...

Page 9: ...for usage of the various card options CD Software Installation The following instructions assume the CD ROM drive is drive D Please substitute the appropriate drive letter for your system as necessar...

Page 10: ...nding on the operating system and automatically finish installing the drivers 9 Run PCIfind exe to complete installing the card into the registry for Windows only and to determine the assigned resourc...

Page 11: ...er must be installed in EITHER the TST or the BEN position for the card to function Interrupt Mode Jumpers Place the Interrupt Select 0 jumper in the INT position to select the Digital I O interrupt p...

Page 12: ...Manual PCI DIO 24DH 12 3 9 4 8 IRQD INT EXT IRQT INTEN INTSEL0 TST BEN Figure 3 1 Option Selection Map version D Figure 3 2 Option Selection Map version H...

Page 13: ...cards and the respective IRQs if any allotted Alternatively some operating systems Windows95 98 2000 can be queried to determine which resources were assigned In these operating systems you can use ei...

Page 14: ...tory as a tool for you to use in configuring jumpers on the card It is menu driven and provides pictures of the card on the computer monitor You make simple keystrokes to select functions The picture...

Page 15: ...up 0 Read Write Base Address 2 PC Group 0 Read Write Base Address 3 Control byte Write Only Base Address 4 Unused Base Address 5 Unused Base Address 6 Unused Base Address 7 Unused Base Address 8 Unuse...

Page 16: ...0 If your card has been modified for use in Mode 1 then there will be an Addenda sheet in the front of this manual These cards cannot be used in PPI Mode 2 because of byte nibble wide buffering Note...

Page 17: ...oller is addressed If for example a control byte of hex 80 has been sent as previously described and the data to be output are correct and it is now desired to open the three groups then it is necessa...

Page 18: ...in BASIC is provided as a guide to assist you in developing your working software In this example the card base address is 2D0 hex and the I O lines of group 0 are to be setup as follows Port A Input...

Page 19: ...te to the card while the TST jumper is installed the PPI output buffers are disabled Thus when you desire to to change the mode you must first set the new mode and then enable the buffers Enabling the...

Page 20: ...ount and starting the cycle over If a trigger occurs before the counter decrements to zero a new count is loaded This forms a retriggerable one shot In mode 1 a low output pulse is provided with a per...

Page 21: ...e Read Counter A1 See description for Base 10 Write Read Base 12 Write Read Counter A2 See description for Base 10 Write Read Base 13 Write Counter Control Register The control byte specifies the coun...

Page 22: ...1 M0 BCD SC0 SC1 These bits select the counter that the control byte is destined for SC1 SC0 Function 0 0 Program Counter 0 0 1 Program Counter 1 1 0 Program Counter 2 1 1 Read Write Cmd See section o...

Page 23: ...is most generally used and is selected for each counter by setting the RW1 and RW0 bits to ones Subsequent read load operations must be performed in pairs in this sequence or the sequencing flip flop...

Page 24: ...ditional parameter that identifies which features should be implemented on this call to the function Each feature can be identified by its unique integer value Multiple features can be run in a single...

Page 25: ...s fall effectively one half the period The Base Address of the card is required as input to the function The signal should be applied to the CLOCK IN pin of the card Software latency will be affected...

Page 26: ...I Gate 4 PC5 5 Counter A2 Freq Out 6 Port C Hi PC4 7 Counter B0 Freq in 8 PC3 9 Ctr B1 P W I Gate 10 PC2 11 Counter B2 Freq Out 12 PC1 13 Counter C0 Freq In 14 Port C Lo PC0 15 Ctr C1 P W I Gate 16 P...

Page 27: ...rt C 7 Hi 3 Port B 7 22 Port C 6 Hi 4 Port B 6 23 Port C 5 Hi 5 Port B 5 24 Port C 4 Hi 6 Port B 4 25 Port C 3 Lo 7 Port B 3 26 Port C 2 Lo 8 Port B 2 27 Port C 1 Lo 9 Port B 1 28 Port C 0 Lo 10 Port...

Page 28: ...anual or just want to give us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates 10623 R...

Reviews: