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Manual PCIe-DIO-48S PCI Express Digital I/O Card
14
Base AB (read/write) COS/C3 IRQ Enable
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
‘0’ ‘0’
Group 1
Port C
Group 1
Port B
Group 1
Port A
Group 0
Port C
Group 0
Port B
Group 0
Port A
Table 5-6
: Base +B, COS/C3 IRQ Enable
At power-up or reset, all IRQ sources on the card are disabled. To enable the C3 IRQ, install the
jumper(s) into one or both of the IENx enable positions. A read or write access to Base A B
enables the C3 IRQ. Once enabled, any rising edge of Port C, bit 3 will generate an interrupt. To
disable the C3 IRQ, move the jumper(s) to the disable position (refer to Chapter 3: Hardware Details
for details).
To enable the COS IRQ, write a zero to the bits that correspond to the port(s) desired. Any changes
detected on the bits within the enabled port(s) will generate an IRQ. To disable COS IRQ, write a one
to bits that correspond to the port(s) desired.
Refer to Base AF for clearing an interrupt.
Base AF (write) IRQ Clear
Any value written to this address will clear pending IRQs.