Acces I/O products PCIe-DIO-24S User Manual Download Page 13 | Manualshive

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Acces I/O products PCIe-DIO-24S User Manual Download Page 13

Manual PCIe-DIO-48S PCI Express Digital I/O Card

13

Base Address +1 (read/write) Group 0, Port B DIO;

+5 (read/write) Group 1, Port B DIO

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0

Table 5-3:

Base +1 Group 0, Port B DIO; Base +5 Group 1, Port B DIO

Reading from this address will return the digital data on Port B. Writing to this address will output the
digital data on Port B. Readback is supported while in output mode. Base A3 / Base
A7 controls Port B's input/output direction.

Base Address +2 (read/write) Group 0, Port C DIO;

+6 (read/write) Group 1, Port C DIO

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0

Table 5-4:

Base +2 Group 0, Port C DIO; Base +6 Group 1, Port C DIO

Reading from this address will return the digital data on Port C. Writing to this address will output the
digital data on Port C. Readback is supported while in output mode. Port C can also be broken into
two nybbles, Port C Low (bits 0-3), and Port C High (bits 4-7). Each nybble can be independently set
as input or output. Base A3 / Base A7 controls Port C's input/output direction.

Base Address +3 (read/write) Group 0 Control;

+7 (read/write) Group 1 Control

Each DIO group contains a control register. This 8-bit register is used to set the direction of the ports.
At power-up or reset, all DIO lines are set as inputs. Each group should be configured during
initialization by writing to the control register even if the ports are going to be used as inputs. Bit 7
must be set to ‘1’ when configuring the direction of the ports. This register can be readback with bits
2, 5, 6, and 7 always reading zero.

Ports can be written to while configured as inputs. When a port is changed from input
to output, the last written value will be applied. If a port has never been written to, the
value on the port's pins while in input mode will be applied to the port when configured
as an output. This prevents the ports pins from glitching when set as outputs.

Bit

Assignment

Code

D0

Port C Lo (C0-C3) 1=Input, 0=Output

D1

Port B

1=Input, 0=Output

D2

Reserved

Set to ‘0’

D3

Port C Hi (C4-C7)

1=Input, 0=Output

D4

Port A

1=Input, 0=Output

D5,D6

Reserved

Set to “00”

D7

Direction Set Flag

1=Active

Table 5-5:

Base +3 and Base +7, Group 0 and 1 Control Register

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Summary of Contents for PCIe-DIO-24S

Page 1: ...CA 92121 y 858 550 9559 y Fax 858 550 7322 contactus accesio com y www accesio com MODELS PCIe DIO 48S PCIe DIO 48 PCIe DIO 24S PCI Express 48 Channel Digital I OCard with Change of State Detection USER MANUAL File MPCIe DIO 48S B1b ...

Page 2: ...t rights of ACCES nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 2009 by ACCES I O Products Inc 10623 Roselle Street San Diego CA 92121 All rights reserved WARNING ALWAYS CONNECT AND DISCONNECT YOUR FIELD CABLING WITH THE COMPUTER POWER OFF ALWAYS TURN COMPUTER POWER OFF BEFORE INSTALLING A BOARD...

Page 3: ...rge for labor or parts not excluded by warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable rates similar to those of other manufacturers in the industry Equipment Not Manufactured by ACCES Equipment provided but not manufactured by ACCES is warranted and will be repaired acc...

Page 4: ...Assignments 15 Chapter 7 Specifications 17 Customer Comments 18 LIST OF FIGURES Figure 1 1 Block Diagram 6 Figure 3 1 Option Selection Map 9 Figure 6 1 50 Pin Male Header 15 LIST OF TABLES Table 1 1 Accessories 7 Table 5 1 Register Address Map 12 Table 5 2 Base 0 Group 0 Port A DIO Base 4 Group 1 Port A DIO 12 Table 5 3 Base 1 Group 0 Port B DIO Base 5 Group 1 Port B DIO 13 Table 5 4 Base 2 Group ...

Page 5: ...user on each I O header Compatible with industry standard I O racks like Gordos Opto 22 Potter Brumfield Western Reserve Controls etc Applications Automatic test systems Laboratory automation Robotics Machine control Security systems energy management Relay monitoring and control Parallel data transfer to PC Sensing switch closures or TTL DTL CMOS logic Driving indicator lights or recorders Functi...

Page 6: ...ply can be used Note All VCCIO 3 3V applications do not require the external power option as the board has sufficient power for this voltage rail By default the DIO lines are pulled up with 10kΩ resistor networks to VCCIO DIO lines can also be factory configured as pulled down DIO wiring connections are via two 50 pin headers on the side of the board A cutout on the card s mounting bracket allows ...

Page 7: ...bbon cable assembly with 50 pin female connectors CAB50 6 Six foot ribbon cable assembly with a 50 pin female header connector and a 50 pin female edge connector STB 50 Screw terminal board ships with standoffs but can also mount on SNAP TRACK or DIN SNAP DIN SNAP 6 Six inch length of SNAP TRACK with two clips for mounting one STB 50 screw terminal board on a DIN rail DIN SNAP One foot length of S...

Page 8: ... Place the CD into your CD ROM drive b The install program automatically run If the install program does not run click START RUN and type B GLQR JJ click OK or press c Follow the on screen prompts to install the software for this board Linux a Please refer to linux htm on the CD ROM for information on installing under Linux Hardware Installation Please install the software package before plugging ...

Page 9: ... enable the C3 IRQ install the IEN jumper in the EN position followed by a read write access to Base Address B Refer to Chapter 5 Programming for details To disable the C3 IRQ install the IEN jumper in the DIS position IEN0 applies to Group 0 and IEN1 applies to Group 1 Figure 3 1 Option Selection Map 50 Pin Headers The 50 pin headers have standard 0 100 spacing between pins and are keyed to preve...

Page 10: ...ards or for general purposes If an over current persists on a circuit protected by the resettable fuse it will open interrupting power to the circuit The amount of time it takes the fuse to act depends on the amount of over current and other conditions such as ambient temperature humidity etc The fuse will remain open until the bi metal elements cool sufficiently at which time the circuit will be ...

Page 11: ... addresses assigned to each function on each of the cards and the respective IRQs Alternatively Windows systems can be queried to determine which resources were assigned In these operating systems you can use either PCIFind or the Device Manager utility from the System Properties Applet of the control panel The card is installed in the Data Acquisition class of the Device Manager list Selecting th...

Page 12: ...ntrol Group 1 Read Write Base Address 8 Not used N A Base Address 9 Not used N A Base Address A Not used N A Base Address B Enable COS Interrupt Read Write Base Address C Not used N A Base Address D Not used N A Base Address E Not used N A Base Address F Clear COS Interrupt Write Only Table 5 1 Register Address Map Base Address 0 read write Group 0 Port A DIO 4 read write Group 1 Port A DIO Bit 7 ...

Page 13: ...y set as input or output Base Address 3 Base Address 7 controls Port C s input output direction Base Address 3 read write Group 0 Control 7 read write Group 1 Control Each DIO group contains a control register This 8 bit register is used to set the direction of the ports At power up or reset all DIO lines are set as inputs Each group should be configured during initialization by writing to the con...

Page 14: ...A read or write access to Base Address B enables the C3 IRQ Once enabled any rising edge of Port C bit 3 will generate an interrupt To disable the C3 IRQ move the jumper s to the disable position refer to Chapter 3 Hardware Details for details To enable the COS IRQ write a zero to the bits that correspond to the port s desired Any changes detected on the bits within the enabled port s will generat...

Page 15: ...in Male Header Pin Signal Name Pin Signal Name 1 PC7 2 GND 3 PC6 4 GND 5 PC5 6 GND 7 PC4 8 GND 9 PC3 10 GND 11 PC2 12 GND 13 PC1 14 GND 15 PC0 16 GND 17 PB7 18 GND 19 PB6 20 GND 21 PB5 22 GND 23 PB4 24 GND 25 PB3 26 GND 27 PB2 28 GND 29 PB1 30 GND 31 PB0 32 GND 33 PA7 34 GND 35 PA6 36 GND 37 PA5 38 GND 39 PA4 40 GND 41 PA3 42 GND 43 PA2 44 GND 45 PA1 46 GND 47 PA0 48 GND 49 VCCIO 50 GND Table 6 1 ...

Page 16: ... C bit 0 PB7 I O Port B bit 7 PB6 I O Port B bit 6 PB5 I O Port B bit 5 PB4 I O Port B bit 4 PB3 I O Port B bit 3 PB2 I O Port B bit 2 PB1 I O Port B bit 1 PB0 I O Port B bit 0 PA7 I O Port A bit 7 PA6 I O Port A bit 6 PA5 I O Port A bit 5 PA4 I O Port A bit 4 PA3 I O Port A bit 3 PA2 I O Port A bit 2 PA1 I O Port A bit 1 PA0 I O Port A bit 0 VCCIO O 5V or optionally 3 3V via 0 5A resettable fuse ...

Page 17: ... VCCIO Logic Low 0V to 0 8V Current 20uA max Digital Outputs Logic High 2 0V min 32mA source Logic Low 0 55V max 64mA sink Power Output VCCIO P2 P3 pin 49 Environmental Operating Temperature 0 to 70 C optional 40 to 85 C Storage Temperature 55 to 150 C Humidity 5 to 90 RH without condensation Board Dimensions Length 6 6 Height 4 2 seated ...

Page 18: ...lems with this manual or just want to give us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates 10623 Roselle Street San Diego CA 92121 Tel 858 550 9559 FAX 858 550 7322 www accesio com ...

Page 19: ...2 462 01 00 Fax 32 0 2 462 01 99 info texim europe com Denmark Fuglegaardsvaenget 25 DK 2820 Gentofte Tel 45 88 20 26 30 Fax 45 88 20 26 39 info texim europe com The Netherlands Elektrostraat 17 NL 7483 PG Haaksbergen Tel 31 0 53 573 33 33 Fax 31 0 53 573 33 30 info texim europe com Germany Martin Kollar Strasse 9 D 81829 München Tel 49 0 89 436 086 0 Fax 49 0 89 436 086 19 info texim europe com G...

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