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Manual PCI-DA12-2/4/6 

15 

Chapter 5: Programming

 

  
These cards

’ DACs and Digital I/O use 40(hex) consecutive I/O addresses. Programming the cards is 

very straightforward as there are only two operating modes, three range-selection switches per channel, 
and one unique addition. The basic operation of a Digital-to-Analog card is to write a 12-bit value to a 
Digital to Analog Converter (DAC) pre-load (outer) register where it is buffered and loaded by an update 
command to a DAC (inner) register. Outputs of that register control a "ladder" network which produces the 
analog output. The output voltage range is defined by settings of the range-selection switches for that 
channel. In C: 
  

outport(BASE+(CH*2), (Volts*4096/10)-2048); 

  
would output "Volts" volts to channel "ch", assuming a bipolar 5V range. For other bipolar ranges, 
substitute the appropriate voltage span in place of "10" in the equation. For unipolar ranges, remove the "-
2048" and use the appropriate voltage span in place of the "10". 
  
Upon power-up, or hardware reset, the DAC registers are restricted to a safe value and the card is set in 
Simultaneous Update mode. 

Since the pre-load register is not cleared upon power-up, but left at an 

undefined value, a known value must be written to the preload registers before using a "Clear Restrict-
Output-Voltage" command. 

  

Simultaneous Update Mode

 is the power-up or default mode of operation for the DAC card. When a 

value is written to a DAC address the output does not change until an output update is commanded via a 
read from Base A8. (Alternatively, a read of Base AA will update the DAC registers and 
switch the board to Automatic Update Mode.) While in Simultaneous Update Mode, a single read will load 
all DAC registers with the value waiting in the pre-load registers, causing all outputs to be updated and 
changed simultaneously. 
  

Automatic Update Mode

 is the configuration that changes a DAC output immediately after the high-byte 

of the new value is written to the DAC address. If the card is in Simultaneous Update Mode a read of 
Base 2 will change the card back to Automatic Update Mode without updating the outputs. A 
read of Base AA will update all outputs simultaneously and then place the card in Automatic 
Update Mode. 
  

Restrict-Output-Voltage

 limits the output of all DAC channels and is active at power-up. Since the pre-

load register is not cleared upon power-up, but left at an undefined value, known values must be written 
to the preload registers before using a "Clear Restrict-Output-Voltage" command.  Those written values 
will then be output to the connector when a "Clear Restrict-Output-Voltage" command is issued by a read 
of Base AF. 
  

External Trigger Update Mode

 allows a negative level at pin 25 of the I/O connector to cause the DACs 

to be updated. A read of Base A5 will enable this mode, a read of Base A6 will disable 
it. Note that this pin is shared with the External Interrupt signal. 
  

External Interrupt

 is a negative edge at pin 25 and is latched until cleared by a read of Base A4. 

The interrupt is enabled by a read of Base 3 and powers up disabled. After being cleared the 
interrupt must be re-enabled. 

Summary of Contents for PCI-DA12-2

Page 1: ...10623 Roselle Street San Diego CA 92121 858 550 9559 FAX 858 550 7322 contactus accesio com www accesio com MODEL PCI DA12 2 4 6 USER MANUAL FILE MPCI DA12 6 C3a...

Page 2: ...ES nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 2000 2005 by ACCES I O Products Inc 10623 Rosel...

Page 3: ...r parts not excluded by warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable...

Page 4: ...ion Selection Map 12 Figure 3 2 Field Wiring 13 Chapter 4 Address Selection 14 Chapter 5 Programming 15 Table 5 1 Register Map 16 Table 5 2 I O Address Map for the Digital I O 16 Table 5 3 Digital I O...

Page 5: ...ual DAC chips are used The analog outputs can be updated either independently or simultaneously The DAC outputs are undefined at power up Therefore in order to prevent excessive outputs to external ci...

Page 6: ...cy LSB Monotonicity 12 bits over operating temperature range Settling Time 8 usec to one LSB for full scale step input Linearity LSB integral non linearity over rated temperature range Gain Stability...

Page 7: ...dity 5 to 95 non condensing External DAC Reference input 4 5V to 5 5V 5V Source output 0 to 500 mA fused resetting 12V Source output 0 to 500 mA fused resetting Size 6 long 152 mm Power Required 5 VDC...

Page 8: ...Manual PCI DA12 2 4 6 8 Figure 1 1 Block Diagram...

Page 9: ...ation on installing under Linux Installing from CD Perform the following steps as appropriate for your operating system Substitute the appropriate drive letter for your drive where you see D in the ex...

Page 10: ...d depending on the operating system and automatically finish installing the drivers 9 Run PCIfind exe to complete installing the card into the registry for Windows only and to determine the assigned r...

Page 11: ...5 0 to 2 5V OFF OFF ON Set in Position V 0 to 5V OFF OFF OFF 0 to 10V OFF ON OFF 2 5V to 2 5V ON OFF ON 5V to 5V ON OFF OFF 10V to 10V ON ON OFF Current Range S1 S2 S3 OUT 0 5 4 mA to 20 mA OFF OFF OF...

Page 12: ...Manual PCI DA12 2 4 6 12 S5 V P2 OUT 5 OUT 3 OUT 1 OUT 4 OUT 2 OUT 0 S3 S1 S6 I S4 S2 Figure 3 1 Option Selection Map...

Page 13: ...rrent Output R Load Excitation Voltage 8 36 V maximum Observe Polarity Ground Voltage Output DAC Analog Voltage Output R Load CARD APPLICATION 5mA maximum Figure 3 2 Field Wiring Caution Do not connec...

Page 14: ...ided This utility will display a list of all of the cards detected on the PCI bus the addresses assigned to each function on each of the cards and the respective IRQs Alternately some operating system...

Page 15: ...ded via a read from Base Address 8 Alternatively a read of Base Address A will update the DAC registers and switch the board to Automatic Update Mode While in Simultaneous Update Mode a single read wi...

Page 16: ...and release card from Simultaneous Mode Base B DAC 5 High Byte Base C Base D Base E Restrict Output Voltage Limits outputs to 15 of full scale range Base F Clear Restrict Output Voltage Allows full o...

Page 17: ...e front of this manual describing that modification This circuit cannot be modified to operate in PPI Mode The circuit is initialized by the computer Reset command all ports set for input and all buff...

Page 18: ...t resolution a corresponding decimal number N between 0 and 4095 is calculated 2 12 4096 N 4096 V out V full scale Next the data are written to the selected analog output channel See the preceding I O...

Page 19: ...equation above for each channel at each possible range 0 6 These constants are used during normal operation to calibrate the output data in real time Refer to the samples provided on disk for an exam...

Page 20: ...siest method of ensuring the table remains accurate Byte Address Channel Value Range Base F0h Channel 0 0 0 5V Base F1h Channel 1 1 0 2 5V Base F2h Channel 2 2 0 10V Base F3h Channel 3 3 5 5V Base F4h...

Page 21: ...7 Digital I O Port B Bit 3 26 5V fused 8 Digital I O Port B Bit 2 27 12V fused 9 Digital I O Port B Bit 1 28 Analog Reference Input 10 Digital I O Port B Bit 0 29 Analog Reference Output 11 Ground 30...

Page 22: ...manual or just want to give us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates 10623...

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