Hardware Setup
2-13
(10). SMB1: System Management Bus Headers
This header is reserved for system management bus (SM bus). The SM bus is a specific implementation
of an I
2
C bus. I
2
C is a multi-master bus, which means that multiple chips can be connected to the same
bus and each one can act as a master by initiating a data transfer. If more than one master simultaneously
tries to control the bus, an arbitration procedure decides which master gets priority.
User’s Manual
Summary of Contents for KD7
Page 20: ...1 4 Chapter 1 1 2 Layout Diagram KD7 G KD7 Series ...
Page 21: ...Introduction 1 5 1 3 Layout Diagram KD7 S User s Manual ...
Page 22: ...1 6 Chapter 1 1 4 Layout Diagram KD7 RAID KD7 Series ...
Page 23: ...Introduction 1 7 1 5 Layout Diagram KD7 B User s Manual ...
Page 24: ...1 8 Chapter 1 1 6 Layout Diagram KD7 KD7 Series ...
Page 86: ...C 6 Appendix C KD7 Series ...
