Abit AB9 QuadGT, User Manual

Page: 48 / 96

2-16 AB9 QuadGT
2.4 Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable By SPD Item Help
X - CAS Latency Time (tCL) Auto
X - RAS# to CAS# Delay (tRCD) Auto
X - RAS# Precharge (tRP) Auto
X - Precharge Delay (tRAS) Auto
X - Command Rate Auto
X - Refresh Cycle Time (tRFC) Auto
PCI-E Compliancy Mode V1.0a
PEG Force X1 Disabled
Init Display First PCI Slot
‚€ :Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
DRAM Timing Selectable
This item sets the optimal timings for the following four items, depending on the memory
module you are using. The default setting “By SPD” configures these four items by reading the
contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module
stores critical parameter information about the module, such as memory type, size, speed,
voltage interface, and module banks. The following items will be available to make adjustments
by selecting option [
Manual] .
- CAS Latency Time (tCL)
- RAS# to CAS# Delay (tRCD)
- RAS# Precharge (tRP)
- Precharge Delay (tRAS)
- Command Rate
- Refresh Cycle Time (tRFC)
PCI-E Compliancy Mode
This item selects the mode for PCI Express add-on card.
PEG Force X1
When set to [Enabled], this item forces the PEG port down to x1 mode.
Init Display First
This item allows you to choose the primary display card.