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EXERCISE 25 : CONFLICTS
ACTION
Attach SOIC Clip to U10 74LS244. Press STARTon the IC tester and observe Conflict
indications CFLT. Attach a BDO LOW to TP1 DIS ADD BUFF (Near the Blue Connector).
Observe test result PASS.
DESCRIPTION
The device being tested has common tri-state outputs on Pins 14,16 & 18. These are
conflicting with the outputs on pins 3,5 & 7 on IC U13. The IC being tested only shows a
CONFLICT on these pins and a Mid-Level
state causes the IC to Fail. The indication of
CONFLICT on the display is not in itself a fault; it is merely an indication that a FAIL result
may be obtained because of interference from other bus-connected outputs on the board
under test.
To stop the Conflict a BDO must be utilised. To gain a Pass for the test we must stop the
other devices on the bus from interfering with the tester operation. To do this we must
ensure all devices on the bus are in there High Impedance state. By causing the Enable pin to
be Logic High on IC U13 we can stop the interference. The BDO is applied to the testpoint
prior to the inverter that drives the enable pin.
COMMENTS
Normally one or more of the BDO leads can be used to disable other ICs on the board to
allow the test to PASS. Depending on the design, it may be simpler to disable the encoder or
the clock pulse that controls the rate of switching on the bus devices. A Reset on a CPU may
stop the decoding so keeping the bus in a static state where only one device has to be
disabled with the BDO. It is better to treat all devices on a bus as a whole rather than dealing
with them as you come across them an a PCB.
Get a knowledge of the configuration of the PCB to help you with dealing with bus devices. In
most cases stopping the clock is the same process so once the best method has been found it
is easier to apply to the rest of the device affected. The same with the bus devices, stop the
clock the one BDO may solve all the Conflicts.
