abi SYSTEM 8 Instruction Manual Download Page 18

 

Page 18 

EXERCISE  22  :  BDO  &  GROUND  CLIP  (BACKDRIVING 
NOISE) 

 

ACTION 

Identify the Ground clip and attach to the test cable as shown in Schematic. Place clip on IC 
U15 (74161). Ensure that the BDO LOW is attached to TP84 DIS CLK.  
 
Press  START  on  the  IC  Tester.    Observe  the  failures  and  then  apply  the  Ground  Clip  to  the 
GND point near to the Ground pin of the IC TP93. 
 

 

 

DESCRIPTION 

This device has a clock signal running to it that gives output failures but also the Analysis box 
suggests that a Ground Clip may be required. The Ground Clip is used to reduce backdriving 
noise.  This  noise  is  caused  by  current  surges  when  backdriving  IC  outputs.  On  the  training 
board we have used a 74S00   (a  relatively  high  current  output  IC)  to  drive  a  clock  signal 
into a 74LS161.  As part of the 74LS161 test, the SYSTEM 8 pin drivers must output a clock 
signal to the CLK pin (pin 2) to test the functionality of the IC.  In this situation, the existing 
clock  on  the  board  under  test  is  "backdriven"  by  the  SYSTEM  8  pin  driver.  This  process 
requires  larger  than  normal  current  of  a  magnitude  that  depends  on  the  device  being 
backdriven. It is particularly large when driving a pin that is in the LOW state since the output 
sink current of most logic families is higher than their source current. This large current can 
cause "ground bounce" on the board, which may cause double clocking of a sequential device 
such as a counter or shift register.  If double clocking occurs, the test will FAIL because the 
test program gets out of step with the operation of the IC under test.   
 
To  remove  this  noise,  the  ground  clip  must  be  used  as  it  provides  a  shorter  ground  return 
path back to the SYSTEM 8 pin driver.  The ground clip should be placed as near as possible 
to the GND pin of the IC under test. 

Summary of Contents for SYSTEM 8

Page 1: ...EM 8 Board Fault Locator ABI Electronics Limited Dodworth Business Park Dodworth Barnsley South Yorkshire S75 3SP United Kingdom tel 01226 207420 fax 01226 207620 web www abielectronics co uk email sales abielectronics co uk ...

Page 2: ...y reference to the circuit diagram and or this manual The results can then be analysed to gain an understanding of the operation of the system Alternatively the training board package contains a CD ROM with a test sequence file TestFlow which can be used to guide the operator through a sequence of tests on the board All instruments are opened and configured automatically leaving the operator free ...

Page 3: ...es of circuit and fault conditions the techniques of fault with the equipment will be highlighted The PCB includes simple circuits for training in basic electronic principles The PCB is designed in sections to give optimum coverage for each aspect of the equipment Circuit and fault conditions are applied by making a switch connected to a PIC which in turn energises relays that switch in components...

Page 4: ...nd terminate the tests The ANALYSIS button opens the Analysis test results window The IC button toggles between the IC diagram and V I views after the test is completed The ACTUAL MASTER toggles changes between views when comparing two test results The Arrow controls are used to step through individual pins or groups of pins in the V I curve view COMMENT When running a TestFlow control and setup i...

Page 5: ... a device with corresponding thresholds for the device under test DUT For example the threshold for and AC device is as a CMOS device threshold so you must use the correct type to test the device properly TTL has a high threshold of 2 4V but the 74C type has a High threshold of 4 0V EXERCISE 3 BOARD FAULT LOCATOR POWER SUPPLY ACTION Attach the red and black power lead from the training board conne...

Page 6: ...hresholds Close the SETUP window Press the START button and observe the IC diagram dragging the test results display to one side if necessary DESCRIPTION The Voltage test quite simply looks at the voltage on each pin in turn and displays the result Much like measuring each IC pin with a Multimeter but much quicker When the voltage test is selected on its own the clip is not automatically orientate...

Page 7: ...rried out from a TestFlow or Live Comparison 2 Comparison results section indicates whether the Connections Voltage Thermal and V I results were the same as those for the saved device within the TestFlow 3 The Status window gives comment on the conditions the system finds present on the device and advises on requirement of Ground Clip COMMENT In normal one off testing there will only be the actual...

Page 8: ...connections test on its own may not always highlight the fault but it is an integral part of the ABI test philosophy without it you will not be able to effectively diagnose a PCB With a truth table test the integrity of the IC is tested to test it the system needs to obtain the circuit connections to the IC these Connections in turn can be used to compare against the connections of a good IC or ag...

Page 9: ...tion on Pin 7 Press NO GND switch and ensure LED lights DESCRIPTION Operating the No GND switch alters the circuit so that the device Ground pin does not present a valid ground to the tester COMMENT In cases like this the first steps are to ensure the clip is connected attached properly and that the BFL supply is correctly referenced If problem remains you must check the continuity of the ground p...

Page 10: ...rity of the IC giving a functional PASS FAIL result The circuit conditions will be taken into account prior to the test and the expected truth table result will be modified accordingly The test will be carried out in LOOP mode as this is the best way to show the changing activity around the IC during testing You will see from the results that the IC s Truth Table result is a PASS given by the ACTU...

Page 11: ... on TTL type devices Whenever there is a Floating pin identified there is likely be an indication of a MID LEVEL voltage As the pin is not being driven by a valid logic level and is floating between there will be an indication of a Mid High or a Mid Low voltage It is most important that you understand that this condition will be normal if the device has a floating pin due to its lack of connection...

Page 12: ...witch and observe the input on Pin 13 change to IPML DESCRIPTION Supplying the input through a potential divider creates both of the conditions Note from the circuit that external components as well as fault conditions can create Mid Levels COMMENT Input Mid Low and Input Mid High can be present for a large number of reasons not necessarily due to a fault condition Circuit design and circuit condi...

Page 13: ...nal diode structure of the gate presents a high impedance to the tester on the floating pin This is a typical feature on TTL devices COMMENT The Shorts presented to the inputs are taken into account as valid circuit conditions when the Truth Table test is run This test shows the ability of the system to adapt to different circuit conditions and still give valid results for the IC Test without any ...

Page 14: ...observe indication STOP the test and read the description DESCRIPTION The input threshold levels on IC Tester can be changed in the SETUP dialogue box For TTL logic the default settings are as follows LOW 0 5V SWITCHING 1 2V HIGH 2 4V When a functional test is executed the outputs of the IC under test are interpreted by comparing them with the preset threshold voltages They would normally be eithe...

Page 15: ... if the output is driving an input of another gate or device that was applying a loading effect to such an extent that the driving stage could not reach its normal output voltage This shows that a MID LEVEL fault shown on the output of one IC may in fact indicate a problem elsewhere in the circuit as in the example on the training board EXERCISE 19 OUTPUT SHORTS ACTION Press START on the IC Tester...

Page 16: ...gnal derived from the clock is present on one or more pins of that IC then a SIGNAL message may appear in yellow on those pins This message is an indication that a changing signal has been detected on that pin The test may be affected in such a way that a good IC could FAIL COMMENTS Changing signals on the board under test are one of the biggest causes of spurious test failures Even if they do not...

Page 17: ...stable output to the IC we are testing This enables the correct logic level to be driven into the IC for the Truth Table test COMMENTS When using the BDO signals you must ensure that the point at which you connect the BDO signal is not directly connected to the IC under test otherwise the system will be driving itself and you will get a LOAD indication Note that the BFL inputs are capable of detec...

Page 18: ...est the SYSTEM 8 pin drivers must output a clock signal to the CLK pin pin 2 to test the functionality of the IC In this situation the existing clock on the board under test is backdriven by the SYSTEM 8 pin driver This process requires larger than normal current of a magnitude that depends on the device being backdriven It is particularly large when driving a pin that is in the LOW state since th...

Page 19: ...EM 8 software is aware of the ICs that may require the ground clip and a warning is given in the analysis box after the test EXERCISE 23 INVALID LINKS ACTION Clip on U15 74LS161 Ensure Ground Clip is attached to TP95 GND and BDO LOW is attached to TP84 DIS CLK Press STARTon the IC tester Press INVALID LINK and COUNTER RELOAD Observe Failure indicators in both cases DESCRIPTION Invalid LINKS can be...

Page 20: ... board will ensure that only one output at a time can be enabled From studying the circuit you can see that the tester can backdrive the Enable signal Pins 1 19 to carry out a complete and effective test on this device as the Address lines on the other device on the bus U10 are not enabled so there will be no output contention COMMENTS The Preliminary and connections tests carried out by the teste...

Page 21: ...ure all devices on the bus are in there High Impedance state By causing the Enable pin to be Logic High on IC U13 we can stop the interference The BDO is applied to the testpoint prior to the inverter that drives the enable pin COMMENTS Normally one or more of the BDO leads can be used to disable other ICs on the board to allow the test to PASS Depending on the design it may be simpler to disable ...

Page 22: ...f the IC is not known This will only work if the IC is functional If the IC is faulty its functionality cannot be identified and therefore it will not be recognised If it is a good IC the IC Identifier will identify it and any ICs which are functionally and pin compatible providing that the IC is in the SYSTEM 8 test library COMMENTS The IC Identifier is ideal for identifying ICs with missing mark...

Page 23: ...6k by 8 Checksum C52D Press VERIFY button Note the Checksum result window Verifies OK EXERCISE 30 LIVE COMPARISON ACTION Add your own live comparison test here on the 74LS244 X2 U13 and U17 DESCRIPTION The Live Comparison feature needs two BFL modules to be fitted in the system 128 Channels Two boards of the same type are needed and all connections are duplicated for each module Setup and test are...

Page 24: ...orming digital V I tests COMMENTS You may find during this exercise that some pins do not compare exactly using the built in comparison algorithm This is because ICs from different manufacturers have slightly different characteristics This may even occur with ICs from different batches from the same manufacturer although in this case the differences would not be so great V I tests for digital IC p...

Page 25: ... clicking on the MASTER ACTUAL button DESCRIPTION In this test the SETUP has been changed to allow Power on tests to be run in conjunction with Power off V I tests Normally the V I test would require correct orientation of the IC Clip In this case the Connections test is carried out to orientate the clip position on the IC it is this information that is used to adjust the position of the V I trace...

Page 26: ...ually The Graphical Test Generator has an associated document provided on the CD Please refer to this document to understand fully the use of the Test Generator EXERCISE 35 SHORT LOCATION ACTIONS Connect SOIC clip to U10 Attach BDO LOW to TP1 to disable U13 and stop Conflict Press START on the IC tester and observe result You will see L2 on pin 18 and 16 If remove the Jumper J3 to BUS_SHORT connec...

Page 27: ...So far we have discovered that 2 pins on the bus are connected However because of the bus structure these two signals appear at many places on the board We must now find the exact location of the short using the Short Locator instrument The connections test in the previous test found LINKS between bus lines The exact location can be found with the Short Locator This has an audible indication to al...

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