Abell A720T, Service Manual

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A720T (VHF) Service Manual V1.0
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SP
IF AMP AK2365A DET
DET
LPF
FM IF IC U500
IC501
LPF HPF
Q311
SW
TDA2822
U306
Q302
Power SW
W/N SW
U301
TLV320AIC3204
QT /DQT
U300
CPU
B
US
Y
FM
_M
U
TE
A
F_
M
OD
E
TI
Chart 3 AF Amplifier and Squelch
W/N
De_emphasis
U302
SCT3258
5.4 Phase Locked Frequency Synthesize
The PLL circuit generates the first vibration signal for reception and the RF carrier signal for transmission.
5.4.1 PLL Circuit
Step frequency of PLL is 5 or 6.25KHz.The 19.2MHz reference oscillator signal is divided in a phase-locked loop
(U601) by a hybrid counter and generates a reference frequency of 5 or 6.25KHz. The voltage controlled oscillator
(VCO) outputs signal is buffer amplified by Q605 then divided in PLL(U601) by a dual-module programmable
counter .The divided signal is compared in (U601) with a phase comparator with a 5 or 6.25 KHz reference signal.
The ouput signal from the phase comparator is filtered through a low-pass filter and passed to the VCO to control the
oscillation frequency. (See Fig.4)
5.4.1 Voltage-Controlled Oscillator(VCO)
19.2MHz
PLL DATA
REF OSC
I/M
I/N
U601 PLL LMX2571
5KHz/6.25KHz
PHASE
COMPARATOR
CHARGE
PUMP
LPF
Chart 4 PLL Circuit
TX /R X
SW
HS C277
D509, D2
RF-OUT
Q601 generate operation frequency during transmitting mode, Q602 generate operation frequency during receiving
mode. From phase comparator to Varactor Diodes(D603 and D609 in transmitting mode,D606 and D607 in receiving