Aaeon SBC-455, Product Manual

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50 SBC-455 User's Manual
PCI Latency Timer (in PCI Clocks)
This option sets latency of all PCI devices on the PCI bus. The
settings are in units equal to PCI clocks. The settings are 32, 64,
96, 128, 160, 192, 224, or 248. The Optimal and Fail-Safe default
settings are 64 .
VGA Locate Bus
This option allows you to select VGA bus. The setting is PCI and
ISA (Default).
CPU to PCI Write Buffer
This option sets the write buffer between CPU and PCI bus. The
default setting is Enabled.
PCI IDE BusMaster
Set this option to Enabled to specify that the IDE controller on the
PCI local bus has bus mastering capability. The settings are
Disabled or Enabled . The Optimal and Fail-safe default settings are
Disabled .
Offboard PCI IDE Card
This option specifies if an offboard PCI IDE controller adapter card
is used in the computer. You must also specify the PCI expansion
slot on the motherboard where the offboard PCI IDE controller card
is installed. If an offboard PCI IDE controller is used, the onboard
IDE controller on the motherboard is automatically disabled. The
settings are Disabled , Auto , Slot1 , Slot2 , Slot3 , or Slot4 .
If Auto is selected, AMIBIOS automatically determines the correct
setting for this option. The Optionmal and Fail-Safe default settings
are Auto .