H a l f - s i z e C P U C a r d
H S B - 8 1 1 P
Appendix A Programming the Watchdog Timer
A-10
push ax
push cx
xchg al,cl
mov cl,07h
call Superio_Set_Reg
pop cx
pop ax
ret
Set_Logic_Device endp
;Select 02Eh->Index Port, 02Fh->Data Port
Cfg_Port DB 087h,001h,055h,055h
DW 02Eh,02Fh
END Main
Note: Interrupt level mapping
0Fh-Dh: not valid
0Ch: IRQ12
.
.
03h: IRQ3
02h: not valid
01h: IRQ1
00h: no interrupt selected
Summary of Contents for HSB-811P
Page 30: ...Half size CPU Card H S B 8 1 1 P Chapter 3 Award BIOS Setup 3 1 Chapter Award 3 BIOS Setup...
Page 49: ...Half size CPU Card H S B 8 1 1 P Appendix B I O Information B 1 I O Information Appendix B...
Page 50: ...Half size CPU Card H S B 8 1 1 P Appendix B I O Information B 2 B 1 I O Address Map...
Page 51: ...Half size CPU Card H S B 8 1 1 P Appendix B I O Information B 3 B 2 Memory Address Map...
Page 53: ...Half size CPU Card H S B 8 1 1 P Appendix C Mating Connector C 1 Mating Connector Appendix C...
