Aaeon GENE-TGU6 User Manual Download

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Chapter 1

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Product Specifications

3.5

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Sub

ard

E-

1.2 Block Diagram

Summary of Contents for GENE-TGU6

Page 1: ...Last Updated October 12 2021 GENE TGU6 3 5 Subcompact Board User s Manual 1st Ed...

Page 2: ...in this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may resul...

Page 3: ...istered trademark of Microsoft Corp Intel and Celeron are registered trademarks of Intel Corporation Intel Core are trademarks of Intel Corporation ITE is a trademarkof Integrated Technology Express I...

Page 4: ...Packing List Before setting up your product please make sure the following items have been shipped Item Quantity GENE TGU6 MB 1 If any of these items are missing or damaged please contact your distri...

Page 5: ...descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if any to...

Page 6: ...ransient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed nea...

Page 7: ...sion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displayed...

Page 8: ...plosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and...

Page 9: ...Preface IX 3 5 Subcompact Board GENE TGU6 China RoHS Requirements CN AAEON Main Board Daughter Board Backplane Pb Hg Cd Cr VI PBB PBDE O SJ T 11363 2006 X SJ T 11363 2006...

Page 10: ...enyl Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s p...

Page 11: ...8 Function Selection JP4 12 2 3 5 LVDS eDP Backlight Inverter VCC LVDS VDD Selection JP5 12 2 3 6 LVDS eDP Port Backlight Lightness Control Mode Selection JP6 13 2 3 7 Clear CMOS Jumper JP7 13 2 4 Lis...

Page 12: ...4 21 LAN RJ 45 Dual Port i225 and i219 CN27 35 2 4 22 DP Connector CN28 36 2 4 23 DP HDMI Connector CN29 37 2 4 24 Battery Connector CN31 39 2 4 25 SPI BIOS Debug Port CN32 40 2 4 26 M 2 M Key 2280 Sl...

Page 13: ...tup Submenu System I O 84 3 5 1 PCI Express Configuration 85 3 5 2 Storage Configuration 86 3 5 2 1 NVMe Configuration 87 3 5 3 HD Audio Subsystem Configuration Settings 88 3 5 4 Digital IO Port Confi...

Page 14: ...Priorities 106 3 8 Setup Submenu Save Exit 107 Chapter 4 Driver Installation 108 4 1 Driver Download Installation 109 Appendix A I O Information 112 A 1 I O Address Map 113 A 2 Memory Address Map 114...

Page 15: ...3 5 Subcompact Board GENE TGU6 Chapter 1 Chapter 1 Product Specifications...

Page 16: ...50GHz up to 4 10GHz Core i3 1115G4E 2C 4T 2 20GHz up to 3 90GHz Celeron 6305E 2C 2T 1 80GHz CPU TDP 15W up to 28W Core i7 1185G7E Core i5 1145G7E Core i3 1115G4E 15W only Celeron 6305E Chipset Integra...

Page 17: ...1185G7E DDR4 3200MHz 32GB x 2 Power Consumption Max 7 32A at 12V Intel i7 1185G7E DDR4 3200MHz 32GB x 2 Display Controller Intel Iris Xe Graphics Intel UHD Graphics LVDS eDP LVDS Dual Channel 18 24 b...

Page 18: ...P1 4 x 1 Power Input Phoenix 2 pin Connector Other Internal I O USB USB2 0 x 2 Serial Port COM1 COM3 COM4 RS232 422 485 COM2 RS232 422 485 supports 5V 12V RI Video LVDS eDP x 1 Default LVDS eDP up to...

Page 19: ...select with BIOS M 2 M Key 2280 x 1 PCIe x4 E Key 2230 x 1 PCIe USB2 0 BIO Other Mechanical Dimensions 5 75 x 4 146mm x 101 7mm Environmental Operating Temperature 32 F 140 F 0 C 60 C Storage Temperat...

Page 20: ...Chapter 1 Product Specifications 6 3 5 Subcompact Board GENE TGU6 1 2 Block Diagram...

Page 21: ...3 5 Subcompact Board GENE TGU6 Chapter 2 Chapter 2 Hardware Information...

Page 22: ...Chapter 2 Hardware Information 8 3 5 Subcompact Board GENE TGU6 2 1 Dimensions...

Page 23: ...Chapter 2 Hardware Information 9 3 5 Subcompact Board GENE TGU6 2 2 Jumpers and Connectors Top View Front I O View Thermal Source 1 Thermal Source 1...

Page 24: ...Chapter 2 Hardware Information 10 3 5 Subcompact Board GENE TGU6 Bottom View Thermal Source 2 Front I O...

Page 25: ...tion JP3 Auto Power ButtonEnable Disable Selection JP4 COM2 Pin 8 Function Selection JP5 LVDS eDP Port Backlight Inverter VCC Selection and Operating VDD Selection JP6 LVDS eDP Port Backlight Lightnes...

Page 26: ...LVDS VDD Selection 12V 5V Default 3 3V Default 5V Note JP5 Default is two 2 jumpers placed on pins 3 5 and pins 2 4 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6...

Page 27: ...e Information 13 3 5 Subcompact Board GENE TGU6 2 3 6 LVDS eDP Port Backlight Lightness Control Mode Selection JP6 VR Mode PWM Mode Default 2 3 7 Clear CMOS Jumper JP7 Normal Default Clear CMOS 1 2 3...

Page 28: ...ort 3 Port 4 RS232 422 485 Dual Port Header CN10 Mini Card Slot Full Size CN11 DDR4 SO DIMM Slot CN12 M 2 E Key 2230 CN13 COM Port 1 Port 2 RS232 422 485 Dual Port Header CN15 Touch Screen Connector O...

Page 29: ...Only CN31 BatteryConnector CN32 SPI BIOS Debug Port CN33 M 2 M Key 2280 CN35 USB3 2 Gen 2 Port 3 Port 4 Dual Port Connector CN36 i219 LED Connector CN37 i225 LED Connector 2 4 1 5V Output for SATA HD...

Page 30: ...Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND 2 4 3 External Power Input CN3 Pin Pin Name Signal Type Signal Level 1 12V PWR 9 36V or 12V...

Page 31: ...3 5 Subcompact Board GENE TGU6 2 4 4 Audio I O Port CN5 Pin Pin Name Signal Type 1 LOUT_R OUT 2 MIC_R IN 3 LOUT_L OUT 4 MIC_L IN 5 JD_LOUT IN 6 JD_MIC IN 7 AUD_GND GND 8 AUD_GND GND 9 JD_LIN IN 10 LI...

Page 32: ...ation 18 3 5 Subcompact Board GENE TGU6 2 4 5 External 5VSB Input CN6 Pin Pin Name Signal Type Signal Level 1 PS_ON OUT 5V 2 GND GND 3 5VSB PWR 5V at 2A 2 4 6 DDR SO DIMM Slot CN7 Standard Specificati...

Page 33: ...bcompact Board GENE TGU6 2 4 7 COM Port 3 Port 4 Dual Header CN8 RS 232 Pin Pin Pin Name Signal Type Signal Level 1 2 DCD IN 3 4 RX IN 5 6 TX OUT 5V 7 8 DTR OUT 5V 9 10 GND GND 11 12 DSR IN 13 14 RTS...

Page 34: ...Signal Level 1 2 RS485_D I O 5V 3 4 RS485_D I O 5V 5 6 NC 7 8 NC 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 NC 19 20 NC RS 422 Pin Pin Pin Name Signal Type Signal Level 1 2 RS422_TX OUT 5V 3 4 RS42...

Page 35: ...l 1 PCIE_WAKE IN 2 3 3VSB PWR 3 3V 3 NC 4 GND GND 5 NC 6 1 5V PWR 1 5V 7 PCIE_CLK_REQ IN 8 UIM_PWR PWR 9 GND GND 10 UIM_DATA I O 11 PCIE_REF_CLK DIFF 12 UIM_CLK IN 13 PCIE_REF_CLK DIFF 14 UIM_RST IN 1...

Page 36: ...DIFF 26 GND GND 27 GND GND 28 1 5V PWR 1 5V 29 GND GND 30 SMB_CLK I O 3 3V 31 PCIE_TX DIFF 32 SMB_DATA I O 3 3V 33 PCIE_TX DIFF 34 GND GND 35 GND GND 36 USB_D DIFF 37 GND GND 38 USB_D DIFF 39 3 3VSB...

Page 37: ...vel 51 NC 52 3 3VSB PWR 3 3V 2 4 9 DDR SO DIMM Slot CN11 Standard Specifications 2 4 10 M 2 E Key 2230 CN12 Standard Specifications 2 4 11 COM Port 1 Port 2 Dual Header CN13 RS 232 Pin Pin Pin Name Si...

Page 38: ...V 12V IN 19 20 NC Note RI 5V 12Vfor COM2 only RS 485 Pin Pin Pin Name Signal Type Signal Level 1 2 RS485_D I O 5V 3 4 RS485_D I O 5V 5 6 NC 7 8 NC 9 10 GND GND 11 12 NC 13 14 NC 15 16 NC 17 18 NC 19 2...

Page 39: ...can be set by BIOS setting Default is RS 232 Note 2 Pin8 function can be set by JP4 See Ch 2 3 4 2 4 12 Touchscreen Connector Optional CN15 Note Touchmode can be set by BIOS 8 Wire Mode Pin Pin Name S...

Page 40: ...Chapter 2 Hardware Information 26 3 5 Subcompact Board GENE TGU6 4 Wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 TOP IN 3 BOTTOM IN 4 LEFT IN 5 RIGHT IN 6 NC 7 NC 8 NC 9 NC...

Page 41: ...dware Information 27 3 5 Subcompact Board GENE TGU6 5 Wire Mode Pin Pin Name Signal Type Signal Level 1 GND GND 2 UL Y IN 3 UR H IN 4 LL L IN 5 LR X IN 6 SENSE S IN 7 NC 8 NC 9 NC Note TouchMode can b...

Page 42: ...13 eSPI Debug Port CN16 Pin Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 SMB...

Page 43: ...escription Pin Signal Description 1 PD0 2 PD1 3 PD2 4 PD3 5 PD4 6 PD5 7 PD6 8 PD7 9 V5S 0 5A 10 GND 2 4 15 LVDS eDP Port CN18 Note LVDS LCD_PWR can be set to 3 3V or 5V by JP5 See Ch 2 3 5 Note LVDS L...

Page 44: ...CD_PWR LCD_PWR PWR 3 3V 5V 8 GND GND GND 9 LVDS_DA0 eDP_TXN2 DIFF 10 LVDS_DA0 eDP_TXP2 DIFF 11 LVDS_DA1 eDP_TXN1 DIFF 12 LVDS_DA1 eDP_TXP1 DIFF 13 LVDS_DA2 eDP_TXN0 DIFF 14 LVDS_DA2 eDP_TXP0 DIFF 15 L...

Page 45: ...P Signal Type Signal Level 27 LCD_PWR LCD_PWR PWR 3 3V 5V 28 GND GND GND 29 LVDS_B_CLK NC DIFF 30 LVDS_B_CLK NC DIFF 2 4 16 Nano SIM Card Socket CN19 Pin Pin Name Signal Type Signal Level 1 UIM_PWR PW...

Page 46: ...ormation 32 3 5 Subcompact Board GENE TGU6 2 4 17 USB 2 0 Port 5 Port 6 Dual Header CN21 USB Port 5 USB Port 6 Pin Pin Name Pin Pin Name 1 5VSB 0 5A 2 5VSB 0 5A 3 USB5_D 4 USB6_D 5 USB5_D 6 USB6_D 7 G...

Page 47: ...or CN22 Pin Pin Name Signal Type Signal level 1 BKL_PWR PWR 5V 12V 2 BKL_PWR PWR 5V 12V 3 BKL_CONTROL OUT 4 GND GND 5 GND GND 6 BKL_ENABLE OUT 3 3V Note 1 LVDS BKL_PWR can be set to 5V or 12V by JP5 S...

Page 48: ...23 Pin Pin Name Signal Type Signal Level 1 GND GND 2 FAN_POWER PWR 12V at 1A 3 FAN_TAC IN 4 FAN_CTL 2 4 20 USB 3 2 Gen 2 Ports 1 2 Dual Connector CN26 Pin Pin Name Signal Type Signal Level 1 5VSB PWR...

Page 49: ...A 11 USB1_D DIFF 12 USB1_D DIFF 13 GND GND 14 USB1_SSRX DIFF 15 USB1_SSRX DIFF 16 GND GND 17 USB1_SSTX DIFF 18 USB1_SSTX DIFF 2 4 21 L AN RJ 45 Dual Port i225 and i219 CN27 i225 i219 Pin Pin Name Pin...

Page 50: ..._N 1P9 LAN2_MDI3_P 2P9 LAN1_MDI3_P 1P10 LAN2_MDI3_N 2P10 LAN1_MDI3_N 2 4 22 DP Connector CN28 Pin Pin Name Signal Type Signal Level 1 DP1_TX0_DP DIFF 2 GND GND 3 DP1_TX0_DN DIFF 4 DP1_TX1_DP DIFF 5 GN...

Page 51: ...l Level 14 GND GND 15 DP1_AUX_DP I O 16 GND GND 17 DP1_AUX_DN I O 18 DP1_HPD I O 19 GND GND 20 V3P3S PWR 3 3V 2 4 23 DP HDMI Connector CN29 Pin Pin Name Signal Type Signal Level DP Port 1 DP2_TX0_DP D...

Page 52: ..._DP DIFF 11 GND GND 12 DP2_TX3_DN DIFF 13 GND GND 14 GND GND 15 DP2_AUX_DP I O 16 GND GND 17 DP2_AUX_DN I O 18 DP2_HPD I O 19 GND GND 20 V3P3S PWR 3 3V HDMI Port 21 HDMI_TX2 DIFF 22 GND GND 23 HDMI_TX...

Page 53: ...compact Board GENE TGU6 Pin Pin Name Signal Type Signal Level 33 NC 34 NC 35 DDC_CLK I O 5V 36 DDC_DATA I O 5V 37 GND GND 38 5V PWR 5V 39 HDMI_HPD 2 4 24 Battery Connector CN31 Pin Pin Name Signal Typ...

Page 54: ...6 2 4 25 SPI BIOS Debug Port CN32 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC 2 4 26 M 2 M Key 2280 Slot CN33 Standard...

Page 55: ...Pin Name Signal Type Signal Level 1 5VSB PWR 5V at 0 9A 2 USB2_D DIFF 3 USB2_D DIFF 4 GND GND 5 USB2_SSRX DIFF 6 USB2_SSRX DIFF 7 GND GND 8 USB2_SSTX DIFF 9 USB2_SSTX DIFF 10 5VSB PWR 5V at 0 9A 11 US...

Page 56: ...tor CN36 Pin Pin Name Signal Type Signal Level 1 LINK_ACT IO 2 V3P3A PWR 3 3V 3 LAN_1000 IO 4 LAN_100 IO 5 LAN_100 IO 6 LAN_1000 IO 2 4 29 i225 LED Connector CN37 Pin Pin Name Signal Type Signal Level...

Page 57: ...Chapter 2 Hardware Information 43 3 5 Subcompact Board GENE TGU6 2 5 Thermal Solutions 2 5 1 GENE TGU6 FAN01 Single piece cooler does not require use of heat spreader...

Page 58: ...Chapter 2 Hardware Information 44 3 5 Subcompact Board GENE TGU6 GENE TGU6 FAN01 Assembly...

Page 59: ...Chapter 2 Hardware Information 45 3 5 Subcompact Board GENE TGU6 2 5 2 GENE TGU6 HSK01 Single piece heat sink does not require use of heat spreader...

Page 60: ...Chapter 2 Hardware Information 46 3 5 Subcompact Board GENE TGU6 GENE TGU6 HSK01 Assembly...

Page 61: ...Chapter 2 Hardware Information 47 3 5 Subcompact Board GENE TGU6 2 5 3 GENE TGU6 HSP01...

Page 62: ...Chapter 2 Hardware Information 48 3 5 Subcompact Board GENE TGU6 GENE TGU6 HSP01 Assembly...

Page 63: ...3 5 Subcompact Board GENE TGU6 Chapter 3 Chapter 3 AMI BIOS Setup...

Page 64: ...ation against the values stored in the CMOS memory and BIOS NVRAM If a system configuration is not found or an error is detected the module will load the default configuration and reboot automatically...

Page 65: ...BIOS Setup press Del or ESC immediately while your computer is powering up The function for each interface can be found below Main Date and time can be set here Press Tab to switch between date elemen...

Page 66: ...Chapter 3 AMI BIOS Setup 52 3 5 Subcompact Board GENE TGU6 3 3 Setup Submenu Main...

Page 67: ...feature the user acknowledges the security risks Enabling Error Injection allows attackers who have access to the Host Operating System to inject IBECC errors that can cause unintended memory corrupt...

Page 68: ...up 54 3 5 Subcompact Board GENE TGU6 Options Summary IBECC Protect Region 0 7 Disabled Optimal Default Failsafe Default Enabled Enable Disabled In Band ECC for Region 0 7 Note In Band ECCSupport avail...

Page 69: ...Chapter 3 AMI BIOS Setup 55 3 5 Subcompact Board GENE TGU6 3 4 1 Graphics Configuration...

Page 70: ...eDP Disabled Optimal Default Failsafe Default Enabled Enable Disabled this panel LVDS Panel Type 640X480 60HZ 800X480 60HZ 800X600 60HZ 1024X600 60HZ 1024X768 60HZ Optimal Default Failsafe Default 128...

Page 71: ...mal Default Failsafe Default Select backlight control signal type Backlight Type Normal Optimal Default Failsafe Default Inverted Select backlight control signal type Backlight Level 0 10 20 30 40 50...

Page 72: ...IOS Setup 58 3 5 Subcompact Board GENE TGU6 Options Summary Swing Level 450mV Select Swing Level Center Spreading Depth no spreading Optimal Default Failsafe Default 0 5 1 0 1 5 2 0 2 5 Select Center...

Page 73: ...Default When enabled a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Intel R SpeedStep tm Disabled Enabled Optimal Default Failsafe Default Allows more than tw...

Page 74: ...Chapter 3 AMI BIOS Setup 60 3 5 Subcompact Board GENE TGU6 3 4 3 Memory Configuration...

Page 75: ...Chapter 3 AMI BIOS Setup 61 3 5 Subcompact Board GENE TGU6 3 4 4 Hardware Monitor Options Summary Smart Fan Disabled Enabled Optimal Default Failsafe Default Enable or Disable Smart Fan...

Page 76: ...de push pull to control 4 wire fans nLinear fan application circuit to control 3 wire fan speed by fan s power terminal nOutput PWM mode open drain to control Intel 4 wire fans Fan 1 Smart Fan Control...

Page 77: ...Cycle Auto fan speed control Fan speed will follow different temperature by different duty cycle 1 100 Temperature Manual Duty Mode Options Summary Manual Duty Mode 60 Optimal Default Failsafe Defaul...

Page 78: ...Chapter 3 AMI BIOS Setup 64 3 5 Subcompact Board GENE TGU6 3 4 5 PCH FW Configuration...

Page 79: ...5 1 Firmware Update Configuration Options Summary Me FW Image Re Flash Disabled Optimal Default Failsafe Default Enabled Enable Disable Me FW Image Re Flash function FW Update Disabled Enabled Optimal...

Page 80: ...Power Loss Last State Optimal Default Failsafe Default Always On Always Off IO Restore AC power Loss RTC wake system from S5 Disable Optimal Default Failsafe Default Fixed Time Dynamic Time Bypass Fix...

Page 81: ...second 30 Optimal Default Failsafe Default Timer count set to Watch Dog Timer for POST WARNING Do not set to a value equal to or shorter than normal POST time otherwise system may never complete POST...

Page 82: ...old BIOS from POST Delayed POST DXE phase Disabled Optimal Default Failsafe Default Enabled Enabled Robot holds BIOS before POST completion This allows BIOS POST to start with stable power or start af...

Page 83: ...ard Select reset type robot should send on each boot Retry Count 3 Optimal Default Failsafe Default Fill retry counter here Robot will reset system at most counter times and then let system continue i...

Page 84: ...al Default Failsafe Default Fill hold time out here Robot will hold system no longer then time out value and then let system continue its POST At time After show logo Optimal Default Failsafe Default...

Page 85: ...oard GENE TGU6 3 4 7 1 1 Device Detecting Configuration Interface Disabled Options Summary Interface Disabled Optimal Default Failsafe Default PCI DIO SMBUS Legacy I O Super I O MMIO Select interface...

Page 86: ...t Failsafe Default Fill FUNCTION number to a PCI device in hexadecimal Range 0 FF Device is Is not Optimal Default Failsafe Default Select that robot should or should not do action if condition met In...

Page 87: ...egister offset 0 Optimal Default Failsafe Default Fill register offset or index for robot to read in hexadecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register f...

Page 88: ...tion met DIO pin number DIO1 Optimal Default Failsafe Default DIO Fill DIO pin number 0 DIO0 1 DIO1 and so on For COM express product 0 3 GPI0 3 4 7 GPO0 3 Device is Is not Optimal Default Failsafe De...

Page 89: ...n condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read registe...

Page 90: ...ecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for...

Page 91: ...ition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register acco...

Page 92: ...t Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value...

Page 93: ...ion Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read register accord...

Page 94: ...ecimal Range 0 FF Bit offset 0 Optimal Default Failsafe Default Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for...

Page 95: ...n condition Present Optimal Default Failsafe Default Specified register data Select the condition that robot should check for device Present device is detected According to register Robot read registe...

Page 96: ...t Fill bit offset for register for robot to compare with bit value Bit value Low Optimal Default Failsafe Default High Fill bit value for robot to compare register bit with specified offset Byte value...

Page 97: ...N PCS Disabled Optimal Default Failsafe Default Enabled Enable Disable TSN PCS When enabled TSN PCS device will appear in ACPI table PCH TSN Multi Vc Disabled Optimal Default Failsafe Default Enabled...

Page 98: ...Chapter 3 AMI BIOS Setup 84 3 5 Subcompact Board GENE TGU6 3 5 Setup Submenu System I O...

Page 99: ...5 1 PCI Express Configuration Options Summary PCI Express Root Port 5 CN12 Port11 Enabled Optimal Default Failsafe Default Disabled Control the PCI Express Root Port PCIe Speed Auto Optimal Default F...

Page 100: ...ons Summary SATA Controller s Disabled Enabled Optimal Default Failsafe Default Enable Disable SATA Device Port 0 1 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port Hot Pl...

Page 101: ...Chapter 3 AMI BIOS Setup 87 3 5 Subcompact Board GENE TGU6 3 5 2 1 NVMe Configuration...

Page 102: ...U6 3 5 3 HD Audio Subsystem Configuration Settings Options Summary HD Audio Disabled Enabled Optimal Default Failsafe Default Control Detection of the HD Audio device Disabled HDA will be unconditiona...

Page 103: ...3 5 Subcompact Board GENE TGU6 3 5 4 Digital IO Port Configuration Options Summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output l...

Page 104: ...Chapter 3 AMI BIOS Setup 90 3 5 Subcompact Board GENE TGU6 3 5 5 Legacy Logical Devices Configuration...

Page 105: ...t Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows user to change Device s Resource settings N...

Page 106: ...t Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows user to change Device s Resource settings N...

Page 107: ...Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3E8h IRQ 11 IO 2E8h IRQ 11 Allows user to change Device s Resource settings...

Page 108: ...Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2E8h IRQ 11 IO 3E8h IRQ 11 Allows user to change Device s Resource settings...

Page 109: ...erial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default Failsafe Default Enabled Console Redirection Enable or Disable Console Redirection EMS Disabled Optimal Defa...

Page 110: ...ar set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc VT UTF8 Uses UTF8 encoding to map Unicode chars onto 1 or more bytes Bits Per second 9600 19200 38400 57600 115200 Op...

Page 111: ...re more than 1 stop bit Flow Control None Optimal Default Failsafe Default Hardware RTS CTS Flow control can prevent data loss from buffer overflow When sending data if the receiving buffers are full...

Page 112: ...I BIOS Setup 98 3 5 Subcompact Board GENE TGU6 3 5 7 PCH IO Configuration Options Summary MiniCard Slot Function SATA Optimal Default Failsafe Default PCIe Select function enabled for Full size MiniCa...

Page 113: ...en the user enters the Setup utility A User Password does not provide access to many of the features in the Setup utility Select the password you wish to set and press Enter In the dialog box enter yo...

Page 114: ...e TCG EFI protocoland INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Defau...

Page 115: ...ent Hierarchy Disabled Enabled Optimal Default Failsafe Default Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Optimal Default Failsafe Default Select the TCG2 Spec Ver...

Page 116: ...em is in User mode The mode change requires platform reset Secure Boot Mode Custom Optimal Default Failsafe Default Standard Secure Boot mode options Standard or Custom In Custom mode Secure Boot Poli...

Page 117: ...er mode The mode change requires platform reset Restore Factory Keys Force System to User Mode Install factory default Secure Boot key databases Reset To Setup Mode Delete all Secure Boot key database...

Page 118: ...Delete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Up...

Page 119: ...d GENE TGU6 3 7 Setup Submenu Boot Options Summary Quiet Boot Disabled Enabled Optimal Default Failsafe Default Enables or disables showing boot logo Network Stack Disabled Optimal Default Failsafe De...

Page 120: ...Chapter 3 AMI BIOS Setup 106 3 5 Subcompact Board GENE TGU6 3 7 1 BBS Priorities...

Page 121: ...Chapter 3 AMI BIOS Setup 107 3 5 Subcompact Board GENE TGU6 3 8 Setup Submenu Save Exit...

Page 122: ...3 5 Subcompact Board GENE TGU6 Chapter 4 Chapter 4 Driver Installation...

Page 123: ...er where you unzipped the Audio Drivers 2 Run the Setup exe inthe folder 3 Follow the instructions 4 Drivers will be installed automatically Chipset Driver Windows 10 1 Open the folder where you unzip...

Page 124: ...ly 6 After installing the LAN driver install Intel PROSet package optional 7 Open the Wired_PROSet_26 3_x64 folder 8 Run the Wired_PROSet_26 3_x64 exe file in the folder 9 Follow the instructions 10 D...

Page 125: ...Setup exe file in the folder 3 Follow the instructions 4 Drivers will be installed automatically Peripheral Driver Linux 1 Open the folder where you unzipped the Peripheral Drivers 2 Follow the instru...

Page 126: ...3 5 Subcompact Board GENE TGU6 Appendix A Appendix A I O Information...

Page 127: ...Appendix A I O Information 113 3 5 Subcompact Board GENE TGU6 A 1 I O Address Map...

Page 128: ...Appendix A I O Information 114 3 5 Subcompact Board GENE TGU6 A 2 Memory Address Map...

Page 129: ...Appendix A I O Information 115 3 5 Subcompact Board GENE TGU6...

Page 130: ...Appendix A I O Information 116 3 5 Subcompact Board GENE TGU6 A 3 IRQ Mapping Chart...

Page 131: ...Appendix A I O Information 117 3 5 Subcompact Board GENE TGU6...

Page 132: ...3 5 Subcompact Board GENE TGU6 Appendix B Appendix B Mating Connectors and Cables...

Page 133: ...CN2 SATA Connector TechBest 51021 1000 SATA Cable 1709070460 CN3 9 36V Vin Connector N A N A Power Cable 170204010R CN5 Audio Connector Molex 51021 1000 Audio Cable 170X000156 CN6 External 5VSB Power...

Page 134: ...Digital I O Connector Neltron 2026B 10 N A N A CN18 LVDS Connector HIROSE DF13 30DS 1 25C N A N A CN21 USB Port Connector Aces 50238 01041 003 USB Wafer Cable 170010010D CN22 LVDS Inverter Connector A...

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