Appendix A – Watchdog Timer Programming
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A.2 Watchdog Sample Program
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// WDT I/O operation relative definition (Please reference to Table 1)
#define WDTAddr 0x510 // WDT I/O base address
Void WDTWriteByte(byte Register, byte Value);
byte WDTReadByte(byte Register);
Void WDTSetReg(byte Register, byte Bit, byte Val);
// Watch Dog relative definition (Please reference to Table 2)
#define DevReg 0x00 // Device configuration register
#define WDTRstBit 0x80 // Watchdog WDTRST# (Bit7)
#define WDTRstVal 0x80 // Enabled WDTRST#
#define TimerReg 0x05 // Timer register
#define PSWidthBit 0x00 // WDTRST# Pulse width (Bit0:1)
#define PSWidthVal 0x01 // 25ms for WDTRST# pulse
#define PolarityBit 0x02 // WDTRST# Signal polarity (Bit2)
#define PolarityVal 0x00 // Low active for WDTRST#
#define UnitBit 0x03 // Unit for timer (Bit3)
#define ModeBit 0x04 // WDTRST# mode (Bit4)
#define ModeVal 0x01 // 0:level 1: pulse
#define EnableBit 0x05 // WDT timer enable (Bit5)
#define EnableVal 0x01 // 1: enable
#define StatusBit 0x06 // WDT timer status (Bit6)
#define CounterReg 0x06 // Timer counter register
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VOID Main(){
// Procedure : AaeonWDTConfig
// (byte)Timer : Counter of WDT timer.(0x00~0xFF)
// (boolean)Unit : Select time unit(0: second, 1: minute).
AaeonWDTConfig(Counter, Unit);
// Procedure : AaeonWDTEnable
// This procudure will enable the WDT counting.
AaeonWDTEnable();
}
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// Procedure : AaeonWDTEnable
Summary of Contents for GENE-BSW5
Page 1: ...Last Updated June 7 2016 GENE BSW5 3 5 Subcompact Board User s Manual 3rd Ed...
Page 15: ...3 5 Subcompact Board GENE BSW5 Chapter 1 Chapter 1 Product Specifications...
Page 19: ...3 5 Subcompact Board GENE BSW5 Chapter 2 Chapter 2 Hardware Information...
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Page 28: ...Chapter 2 Hardware Information 14 3 5 Subcompact Board GENE BSW5 2 3 Block Diagram...
Page 67: ...3 5 Subcompact Board GENE BSW5 Chapter 3 Chapter 3 AMI BIOS Setup...
Page 102: ...3 5 Subcompact Board GENE BSW5 Chapter 4 Chapter 4 Drivers Installation...
Page 109: ...Chapter 4 Driver Installation 95 3 5 Subcompact Board GENE BSW5...
Page 113: ...3 5 Subcompact Board GENE BSW5 Appendix A Appendix A Watchdog Timer Programming...
Page 118: ...3 5 Subcompact Board GENE BSW5 Appendix B Appendix B I O Information...
Page 119: ...Appendix B I O Information 105 3 5 Subcompact Board GENE BSW5 B 1 I O Address Map...
Page 120: ...Appendix B I O Information 106 3 5 Subcompact Board GENE BSW5 B 2 Memory Address Map...
Page 121: ...Appendix B I O Information 107 3 5 Subcompact Board GENE BSW5 B 3 IRQ Mapping Chart...
Page 122: ...3 5 Subcompact Board GENE BSW5 Appendix C Appendix C Digital I O Ports...
Page 129: ...3 5 Subcompact Board GENE BSW5 Appendix D Appendix D Notes for Users...