M i n i - I T X
E M B - Q M 8 7 A
Appendix E Electrical Specifications for I/O Ports
D-5
************************************************************************************
//
Digital
Output
control
relative
definition
(Please
reference
to
Table
3)
#define
byte
DOutput1LDN
//
This
parameter
is
represented
from
Note27
#define
byte
DOutput1Reg
//
This
parameter
is
represented
from
Note28
#define
byte
DOutput1Bit
//
This
parameter
is
represented
from
Note29
#define
byte
DOutput1Val
//
This
parameter
is
represented
from
Note30
#define
byte
DOutput2LDN
//
This
parameter
is
represented
from
Note31
#define
byte
DOutput2Reg
//
This
parameter
is
represented
from
Note32
#define
byte
DOutput2Bit
//
This
parameter
is
represented
from
Note33
#define
byte
DOutput2Val
//
This
parameter
is
represented
from
Note34
#define
byte
DOutput3LDN
//
This
parameter
is
represented
from
Note35
#define
byte
DOutput3Reg
//
This
parameter
is
represented
from
Note36
#define
byte
DOutput3Bit
//
This
parameter
is
represented
from
Note37
#define
byte
DOutput3Val
//
This
parameter
is
represented
from
Note38
#define
byte
DOutput4LDN
//
This
parameter
is
represented
from
Note39
#define
byte
DOutput4Reg
//
This
parameter
is
represented
from
Note40
#define
byte
DOutput4Bit
//
This
parameter
is
represented
from
Note41
#define
byte
DOutput4Val
//
This
parameter
is
represented
from
Note42
#define
byte
DOutput5LDN
//
This
parameter
is
represented
from
Note43
#define
byte
DOutput5Reg
//
This
parameter
is
represented
from
Note44
#define
byte
DOutput5Bit
//
This
parameter
is
represented
from
Note45
#define
byte
DOutput5Val
//
This
parameter
is
represented
from
Note46
#define
byte
DOutput6LDN
//
This
parameter
is
represented
from
Note47
#define
byte
DOutput6Reg
//
This
parameter
is
represented
from
Note48
#define
byte
DOutput6Bit
//
This
parameter
is
represented
from
Note49
#define
byte
DOutput6Val
//
This
parameter
is
represented
from
Note50
#define
byte
DOutput7LDN
//
This
parameter
is
represented
from
Note51
#define
byte
DOutput7Reg
//
This
parameter
is
represented
from
Note52
#define
byte
DOutput7Bit
//
This
parameter
is
represented
from
Note53
#define
byte
DOutput7Val
//
This
parameter
is
represented
from
Note54
#define
byte
DOutput8LDN
//
This
parameter
is
represented
from
Note55
#define
byte
DOutput8Reg
//
This
parameter
is
represented
from
Note56
#define
byte
DOutput8Bit
//
This
parameter
is
represented
from
Note57
#define
byte
DOutput8Val
//
This
parameter
is
represented
from
Note58
************************************************************************************
Summary of Contents for EMB-QM87A
Page 8: ...Mini ITX E M B Q M 8 7 A Chapter 1 General Information 1 1 Chapter General 1 Information ...
Page 18: ...Mini ITX E M B Q M 8 7 A Chapter 2 Quick Installation Guide 2 4 Solder Side ...
Page 20: ...Mini ITX E M B Q M 8 7 A Chapter 2 Quick Installation Guide 2 6 Solder Side ...
Page 36: ...Mini ITX E M B Q M 8 7 A Chapter 2 Quick Installation Guide 2 22 ...
Page 37: ...E M B Q M 8 7 A Chapter 3 AMI BIOS Setup 3 1 Chapter AMI 3 BIOS Setup ...
Page 40: ...E M B Q M 8 7 A Setup Menu Setup submenu Main Chapter 3 AMI BIOS Setup 3 4 ...
Page 41: ...E M B Q M 8 7 A Setup submenu Advanced Chapter 3 AMI BIOS Setup 3 5 ...
Page 42: ...E M B Q M 8 7 A Super IO Configuration Chapter 3 AMI BIOS Setup 3 6 ...
Page 49: ...E M B Q M 8 7 A H W Monitor Chapter 3 AMI BIOS Setup 3 13 ...
Page 58: ...E M B Q M 8 7 A CPU Configuration Chapter 3 AMI BIOS Setup 3 22 ...
Page 68: ...E M B Q M 8 7 A Setup submenu Chipset Chapter 3 AMI BIOS Setup 3 32 ...
Page 72: ...E M B Q M 8 7 A Memory Configuration Chapter 3 AMI BIOS Setup 3 36 ...
Page 75: ...E M B Q M 8 7 A Setup submenu Exit Chapter 3 AMI BIOS Setup 3 39 ...
Page 76: ...Mini ITX E M B Q M 8 7 A Chapter 4 Driver Installation 4 1 Chapter Driver 4 Installation ...
Page 93: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 1 I O Information Appendix B ...
Page 94: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 2 B 1 I O Address Map ...
Page 95: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 3 ...
Page 96: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 4 B 2 Memory Address Map ...
Page 97: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 5 B 3 IRQ Mapping Chart ...
Page 98: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 6 ...
Page 99: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 7 ...
Page 100: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 8 ...
Page 101: ...Mini ITX E M B Q M 8 7 A Appendix B I O Information B 9 B 4 DMA Channel Assignments ...
Page 102: ...Mini ITX E M B Q M 8 7 A Appendix C Mating Connector C 1 Mating Appendix C Connector ...