3
MANUAL GIGASYNC V2
VER. 2 REV. 1
GigaSync block diagram
The block diagram highlights the presence of three major structures: a CPU ensures the correct
operation of all the basic electronics operation and carries out the voltage and current measurements
(
•
), the other CPU manages the User Interface (
•
), and finally the power components isolated from the
rest of the logic (
•
). The four power INPUTs, each applicable via two redundant connectors, are isolated
from each other and do not apply any conversion to the voltage applied to the cartridges, in this way it
is possible to simultaneously connect different voltages and different polarities (e.g.: INPUT 1
à
48V,
INPUT 2
à
24V, INPUT 3
à
-48V).
Voltage range, power consumption and maximum load
Input Voltage
Self Consumption
Max Load
PoE
36-57 V DC
4.5W
na
MAIN INPUT
18-60 V DC
4.5W
na
INPUT 1
18-60 V DC
0.3W
600W
INPUT 2
18-60 V DC
0.3W
600W
INPUT 3
18-60 V DC
0.3W
600W
The cartridges power INPUTs are equipped with reverse polarity protection: in case of wrong connection,
the corresponding cartridge is not receiving power.
The two CPUs are powered by an isolated converter. In this way it is guaranteed maximum immunity
against electrical faults on the supply lines of the cartridges.
* Functions available only on PoE-CS Cartridge.
** Functions available only on PoE and PoE-CS Cartridge.
MAIN INPUT POWER
INPUT POWER 1
INPUT POWER 2
INPUT POWER 3
isolated
DCDC CONVERTER
CPU
UI
CPU
HW
SYNC
Inverse Polarity
PROTECTION
Inverse Polarity
PROTECTION
Inverse Polarity
PROTECTION
VOLTAGE & LOAD
MEASUREMENT
VOLTAGE & LOAD
MEASUREMENT
VOLTAGE & LOAD
MEASUREMENT
ON / OFF
PROTECTION
ON / OFF
PROTECTION
ON / OFF
PROTECTION
SYNC PULSE
GENERATION *
SYNC PULSE
GENERATION *
SYNC PULSE
GENERATION *
KEY DETECT **
OUTPUT PORTS
Wifi
KEY DETECT **
OUTPUT PORTS
OUTPUT PORTS
KEY DETECT **
Cartridge 1
Cartridge 2
Cartridge 3
ETH PoE
DUAL CPU
SYNC IN SYNC OUT
LEDs OPT
GPS
LE
D
LE
D
LE
D
