3Com EtherLink/MC Technical Reference Manual Download Page 13 | Manualshive

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Summary of Contents for EtherLink/MC

Page 1: ...C Micro Channel Ethernet Adapter Technical Reference Manual A member of the EtherLink product family For 3Com User Group Information 1 800 NET 3Com Manual Part No 4354 02 Published March 1991 Printed in the U S A ...

Page 2: ... on the pan of 3Corn Corporation to provide notification of such revision or changer 3Corn Corporation provides this guide without warranty of any kind either implied or expressed including but not limited to the implied warranties of merchantability and fitness for particular propose 3Corn may make improvt ae or changes in the ixoduc s and or the progrAm s described in this manual at any time Use...

Page 3: ...upts 2 2 Local Area Network Coprocessor 2 2 Packet Buffer 2 3 Memory CycleArbitration 2 4 Transceiver 2 4 EtherStart ROM 2 4 System Configuration Jumper 2 5 Timing Specifications 2 5 Appendix A Register Definitions Appendix B Programmable Option Select Appendix C Programming Guide Appendix D Memory Utilization Error Figures 1 1 EtherLinWMCAdapter Block Diagram 1 1 2 1 PacketBuffer Memory 2 3 Ether...

Page 4: ...Overview The EtherLink MC adapter is based on the Intel 82586 Local Area Network Coprocessor On the network side of the 82586 the SEEQ 8023 or AMD 7992 Manchester Encoder Decoder is used to interface to the transceiver and the AMD 7996 is used as the transceiver chip in the on board thin Ethemet transceiver On the host side the 82586 and the Micro Channel arbitrate for access to the shared 16K pac...

Page 5: ... that address the adapter s memory may run slower than system memory cycles because of the need to arbitrate between the host and the 82586 The only communication path between the host system and the 82586 is through the shared memory Commands are set up in the shared memory by the host and responses from the 82586 are left in the shared memory for the host to interpret The host informs the 82586 ...

Page 6: ...ooting up the host system using a boot volume from a network resource The last 8K of the memory range is consumed by the adapter for this purpose regardless of whether or not a ROM is installed in the adapter s EtherStart ROM socket Though the ROM is only 8 bits wide the Micro Channel supports 16 bit and 32 bit accesses to the ROM by automatically packing the appropriate number of bytes together t...

Page 7: ... the interrupt has been acknowledged the interrupt request line from the EtherLink MC adapter will be deasserted Refer to the Intel Microcomrnunicauons Handbook for details on interrupts and their acknowledgement EtherLink MC adapter supports open collector level sensed interrupt sharing Any interrupt handler written for this adapter must also support this protocol Refer to the IBM Personal System...

Page 8: ... location FFF6 The Packet Buffer resides in the first 16K of the 24K of Micro Channel memory address space that the adapter consumes Relative to the Micro Channel host the 82586 reset vector should be set up at location CO00 3FF6 assuming a memory base address of 0C0000H of bank 3 The Packet Buffer s Micro Channel base address is set by the RAM bits in POS register 0 see appendix B The 16K segment...

Page 9: ...ty the 82586 immediately proceeds with its cycle During the latter portion of the 82586 cycle all Micro Channel accesses to the adapter will be deferred until immediately after the 82586 has completed its cycle During typical operations supporting the transfer of continuous 10 Mbit s of data to or from the adapter will consume approximately 35 of the available bandwidth of a 10MHz 80286 Micro Chan...

Page 10: ...r Without the jumper if there isn t an entry in the system s CMOS RAM for the adapter the system will leave the adapter in the disabled state and its ROM won t be found during the ROM scan When using the adapter in this specialized configuration care must be taken that no bus conflicts will occur because the adapter will be enabled before it is configured The power up default configuration for the...

Page 11: ...ead Only 7 6 5 4 3 2 1 0 47 46 45 44 43 42 41 40 I I I I I I Register 1 Network Address byte 1 Read Only 7 6 5 4 3 2 1 0 39 38 37 36 35 34 35 32 i I I I e Register 2 Network Address byte 2 Read Only 7 6 5 4 3 2 1 0 i 31 o 8 7 s 4 I I I t Network Address byte 3 Read Only 6 5 3 2 Register 3 7 1 0 I o 8 s I I I I I Register 4 Network Address byte 4 Read Only 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 I I ...

Page 12: ...e INTE bit Proper use of the 82586 will prevent the generation of interrupts The INTE bit should generally be set and only cleared for diagnostic or development applications INT Interrupt Active Read Only This status bit is set when the 82586 asserts its interrupt line This status bit is not latched and reflects the immediate condition of the 82586 s interrupt line Use of this bit is intended prim...

Page 13: ...re undefined This bit should be set to zero for normal operation of the adapter Register 7 EtherLink MC Adapter Revision Level 7 6 5 4 3 2 1 0 I RL3 RL2 RL1 RL0 1 11 1 I I RL 3 0 Revision Level Read Only These four bits are available to indicate the software compatibility revision level of the adapter The initial version of the adapter s revision code was F hex The gate array version of the adapte...

Page 14: ...Location XXX2H 7 6 5 4 3 2 1 o I IFBK1 IFBK0 BNC RAM1 I RAM0 ARA1 I ARA0 CDEN I I CDEN Card Enable Read Write This bit is set when the adapter has been enabled by the POST routine Generally when the CDEN bit is cleared the adapter will only respond to setup operations It is possible however for the adapter to be enabled even if this bit indicates that it shouldn t be If the adapter s Network Addre...

Page 15: ...e for the POST routine to incorrectly set the interrupt level It is therefore recommended that when determining the configuration of the adapter drivers should read the feedback bits IFBK 1 0 and then write the corresponding interrupt select code to location XXX3H while in setup mode No other configuration registers should ever be or ever need to be written to by drivers or applications Register 1...

Page 16: ...tention line require deliberate action by the host to deassert them Neither of these signals generate automatic strobes when set A version number of the adapter can be obtained by reading location I O base 7 Version numbers will be used to differentiate between the initial adapters and future versions that may contain enhancements Proper use of the information provided by the version number will a...

Page 17: ...ained a memory allocation error When configured to use I O base address C8000 or D8000 the adapter responds through a 32KB range resulting in a double appearance of the start PROM in host memory which may cause the adapter to malfunction Normal network operaton is unaffected The problem has been solved on subsequent production boards ...

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