Ziatech Corporation zPM11, Руководство по оборудованию

Страница: 20 / 94

CHAPTER 3. FUNCTIONAL BLOCKS
The following section gives a detailed description of the hardware components found on the zPM11.
A block diagram of the zPM11 is shown below.
PCI Interface Connector
Super VGA
Controller
Video
Memory (2-4 Mbyte)
Video Output
Optional Feature
Connector Interface
zPM11 Functional Block Diagram
CPU INTERFACE
The zPM11 connects to the CPU through the 150-pin J1 CompactPCI Mezzanine Connector. The
interface consists of a 32-bit data/address bus (this bus also handles various control signals for PCI
transfers). See the "J1 CompactPCI Mezzanine Connector Pinout" table for pin definitions.
The zPM11 supports bus speeds up to 33 MHz, giving a theoretical bandwidth of 132 Mbytes per
second. The PCI bus allows the zPM11 to support the most demanding graphic applications while not
taking away bandwidth from the backplane bus.
The connector pinout adheres to the CompactPCI mezzanine standard and can be used on other
boards that support this standard. For more information on the CompactPCI standard contact
Ziatech.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com