YASKAWA CPU 013C, Руководство пользователя

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5.8.3 Proceeding
In the Siemens SIMATIC Manager the following steps should be executed:
1. Perform a hardware configuration for the CPU.
Ä
Chapter 4.4 ‘Hardware configura-
tion - CPU’ on page 61
2. Double-click the counter sub module of the CPU 314C-2 PN/DP.
ð
The dialog ‘Properties’ is opened.
3. As soon as you select the operating mode for the corresponding channel, a dialog
box with default values for this counter mode is created and shown. Select for the
corresponding channel the operating mode ‘Pulse width modulation - PWM’ .
Ä
Chapter 5.6.6 ‘Counter operating modes’ on page 115
4. Perform the required parameter settings.
5. Safe your project with ‘Station è Safe and compile’ .
6. Transfer your project to your CPU.
n The
Ä
Chapter 5.8.4 ‘SFB 49 - PULSE - Pulse width modulation’ on page 139 should
cyclically be called (e.g. OB 1) for controlling the pulse width modulation.
n The SFB is to be called with the corresponding instance DB. Here the parameters of
the SFB are stored.
5.8.4 SFB 49 - PULSE - Pulse width modulation
The SFB 49 is a specially developed block for compact CPUs for pulse width modulation.
n The SFB PULSE should cyclically be called (e.g. OB 1) for controlling the frequency
measurement.
n
The SFB is to be called with the corresponding instance DB. Here the parameters of
the SFB are stored.
n
Among others the SFB 49 contains a request interface. Hereby you get read and
write access to the registers of the pulse width modulation.
n
So that a new job may be executed, the previous job must have be finished with
JOB_DONE = TRUE.
n
Per channel you may call the SFB in each case with the same instance DB, since the
data necessary for the internal operational are stored here. Writing accesses to out-
puts of the instance DB is not permissible.
n With the SFB PULSE (SFB 49) you have following functional options:
–
Start/Stop the pulse width modulation via software gate SW_GATE
– Enabling/controlling of the PWM output
– Read status bits
– Request to read/write internal registers of the pulse width modulation
Name Declaration Data type Address
(Inst.-DB)
Default
value
Comment
LADDR INPUT WORD 0.0 300h This parameter is not evaluated.
Always the internal I/O periphery is
addressed.
CHANNEL INPUT INT 2.0 0 Channel number
SW_EN INPUT BOOL 4.0 FALSE Enables the Software gate
Hardware configuration
User program
Description
Parameters
VIPA System SLIO
Deployment I/O periphery
Pulse width modulation - PWM > SFB 49 - PULSE - Pulse width modulation
HB300 | CPU | 013-CCF0R00 | en | 16-40 139