Yamaha YSP-1100U, Руководство по обслуживанию

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A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
YSP-1100
63
★
All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
★
Components having special characteristics are marked
s
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
DSP 3/3
0
3.3
3.2
2.5
3.3
3.2
1.7
1.7
0.8
0
0
0
1.7
0.8
1.6
1.6
2.5
3.1
2.5
3.3
1.7
1.7
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
0
0
1.7
0.1
0
1.1 2.5 3.3
0 0 0 0
2.5
2.5 3.3 3.3 0
0
3.3
3.2
2.5
3.3
3.2
1.7
1.7
0.8
0
0
0
0
0.8
1.6
1.6
2.5
3.1
2.5
3.3
1.7
1.7
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
0
0 1.7
0.1
0
1.1 2.5 3.3
3.3
0 0 0
2.5
2.5 3.3 3.3 0
0
3.3
3.2
2.5
3.3
3.2
1.7
1.7
0.8
0
0
0
0
0.8
1.6
1.6
2.5
3.1
2.5
3.3
1.7
1.7
1.5
1.5
1.5
1.5
1.5
1.5
0
0 1.7
0.1
0
1.2 2.5 3.3
0
3.3
0 0
2.5
2.5 3.3 3.3 0
3.2
3.3
0
3.2
3.3
0
3.3
0
0
0
0.1
3.2
3.2
3.3
3.2
0
0
3.0
3.2
0
3.2
3.2
3.0
0
3.3
3.3
3.3
0
3.3
3.3
0
0
0
3.2
0
3.2
3.2
0
3.3
0 0 0 0 0
3.1 3.1
0
3.2 3.3 3.2 0.1
0 0
3.2 3.2 3.1 3.3 3.1
0 0 0
3.3 0.1 0.1
3.1 3.2 0
3.3 3.3 3.3 0 3.3 1.6 0.1 0 0 3.3
3.3 3.3 3.2 3.2 1.4 0 1.6 3.2 3.2 3.2 0 0 3.1 3.1 0.7 0 0 3.2 3.2
3.3
0
0
3.3
0
0
0
0
3.3
3.3
0
3.3
3.3 3.2
0
1.7
1.5
1.7
1.7
0
3.3
2.5
0
5.1
3.3
0
0
3.1
0
3.3
4.8
0
2.5
2.5
1.7
0
1.7
1.7
3.3
0
5.1
3.3
0
0
3.1
0
3.3
4.9
0
2.5
2.5
12.0
5.1
5.1
5.1
0
11.5
11.5
3.3
3.3
0.1
0
0
0.7
1
8
4
5
6
7
2
3
B-2
POINT B-2 Pin 13 of IC26
MICROPROCESSOR
INTERFACE
EXTERNAL RAM
INTERFACE
CONTROL REGISTER
SDBCK
O
MPLO
AD
/CS SO SI SCK IOPOR
T
19~0
CASN RASN
RAMWEN
RAMOEN
SDO0
SDI0
SDI1
SDI2
SDI3
SDI4
SDI5
SDI6
SDI7
SDBCK
SDWCK
XO
XI
CPO
SDI INTERF
A
C
E
SDO1
SDO2
SDO3
SDO4
SDO5
SDO6
SDO7
32 bit DSP Core
PLL
DSP INTERNAL
OPERATING CLOCK
CK (30.72~40.96MHz)
COEFFICIENT
RAM
16 bit
✻
1024 word
PROGRAM
RAM
50 bit
✻
1024 word
ADDRESS
RAM
17 bit
✻
256 word
CONTROL
SIGNALS
RAMD15~0
RAMA17~0
BCK
OP
SD
WCK
O
WCK
O
P
OV
F
END
D
A
T
A
RAM
32 bit
✻
1024 w
o
rd
SDO INTERF
A
C
E
ZER
O
F7R-0L
BCKIN
LRCIN
DIN
MCLK DVDD AVDD
MUTEB SDIDEM SCKDSD LATI2S MODE CSBIWL ZERO
VOUTL
VOUTR
VMID
AGND DGND VREFP VREFN
16 15
14
20 19 18 17 5
6 7
1
2
3
4 13
12
11
8
9 10
IC22, 24 : WM8728
24bit, 192kHz stereo DAC
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
NC
TEST
GND
IC23 : S-29630AFJA
CMOS serial EEPROM
Memory array
Address
decoder
Data register Output buffer
Mode decode logic
Clock generator
VCC
GND
DI
SK
CS
DO
IC18-20 : YSS930-SZ
DSP
IC21 : SN74AHC1G08DCKR
2-input AND gate
IC25 : NJM2068MD-TE2
Dual operational amplifier
– +
OUT
1
–IN
1
–V
CC
+V
CC
OUT
2
1
2
3
4 5
+IN
1
–IN
2
+IN
2
– +
6
7
8
Y 4
B 2
GND 3
Vcc 5 A 1
P
age 67
to INPUT (1)_CB508
J4
P
age 66
to INPUT (2)_CB3
J5
P
age 66
to INPUT (2)_CB2
J3
P
age 64
to AMP (2)_CB502
D2
P
age 65
to AMP (1)_CB702
C2
P
age 68
to OPERA
TION (1)
_CB1
J5
P
age 68
to OPERA
TION (4)
_CB302
B3
DSP
MICROPROCESSOR
EEPROM
DAC
for Woofer
DAC SW
AMP